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Patent # Description
US-8,289,832 Input signal processing system
An input signal processing system is described. It comprises a first transconductance device having a first input, second input, and an output, wherein the...
US-8,289,651 Apparatus to control heat dissipation in hard-disk drives
Methods and apparatus to control heat dissipation in hard-disk drives (HDDs) are disclosed. A disclosed example apparatus comprises a semiconductor die, a...
US-8,289,257 Reduced swing differential pre-drive circuit
A circuit for reducing and offsetting the voltage swing of a differential pre-drive circuit. The circuit includes a first H-bridge of transistors receiving a...
US-8,289,205 Reacquiring satellite signals quickly
Embodiments of the invention provide a method of reacquiring satellite signals quickly. A pseudorange of at least one satellite is estimated. A user's position...
US-8,289,198 Low power bit switches and method for high-voltage input SAR ADC
A switched capacitor circuit, which may be an SAR ADC, includes a plurality of bit switching circuits (33) each including a high-voltage sampling switch circuit...
US-8,289,183 System and method for solar panel array analysis
A system and method for monitoring performance of one or more solar panels in a photovoltaic array. The system and method includes a number of sensors are...
US-8,289,009 Low dropout (LDO) regulator with ultra-low quiescent current
An apparatus includes at least one filter configured to filter a reference voltage to generate a filtered reference voltage. The apparatus also includes an...
US-8,288,953 Buck constant average current regulation of light emitting diodes
An apparatus includes pulse width modulation (PWM) circuitry configured to generate a PWM signal based on a feedback voltage associated with current flowing...
US-8,288,849 Method for attaching wide bus memory and serial memory to a processor within a chip scale package footprint
A semiconductor device including a first memory die having a first memory type, a second memory die having a second memory type different from the first memory...
US-8,288,834 Semiconductor wafer and die that include an integrated circuit and two or more different MEMS-based...
Various semiconductor devices can be formed at the end of a common fabrication process, thereby significantly improving manufacturing flexibility, by...
US-8,288,820 High voltage power integrated circuit
A high performance, power integrated circuit composed of two charge balanced, extended drain NMOS transistors (CBDEMOS) formed on an n-substrate. A CBDENMOS...
US-8,288,805 Semiconductor device with gate-undercutting recessed region
A semiconductor device comprises a gate structure on a semiconductor substrate and a recessed region in the semiconductor substrate. The recessed region has a...
US-8,288,283 Aluminum enhanced palladium CMP process
A process of forming an integrated circuit using a palladium CMP operation in which 25 to 125 ppm aluminum is added to the CMP slurry, allowing a palladium...
US-8,288,243 Method for fabricating through substrate microchannels
A method of forming large microchannels in an integrated circuit by etching an enclosed trench into the substrate and later thinning the backside to expose the...
US-8,286,929 Clam shell two-pin wafer holder for metal plating
A clam shell wafer holder includes a base and a lid pivotally connected with the base by an integral hinge. The base includes a rotatable wafer support, and the...
US-8,286,042 On-chip seed generation using boolean functions for LFSR re-seeding based logic BIST techniques for low cost...
This invention generates the random seed patterns using simple, low-area overhead digital circuitry on-chip. This circuit is implemented as a finite state...
US-8,284,963 Method and apparatus for diminishing mismatch effects between switched signals
A circuit for diminishing mismatch effects between at least two switched signals includes at least three processing circuits configured to receive at least two...
US-8,284,886 Radio frequency built-in self test for quality monitoring of local oscillator and transmitter
A system and method for low-cost performance and compliance testing of local oscillators and transmitters for wireless RF applications. A preferred embodiment...
US-8,284,626 Voltage compensated tracking circuit in SRAM
Supply voltage compensated tracking circuit in a split-rail static random access memory (SRAM). The circuit includes a tracking circuit for tracking a delay...
US-8,284,581 Active rectifier and method for energy harvesting power management circuit
An active rectifier (12) couples a first input voltage (Vin1) to a first electrode of a first transistor (M3) having a second electrode coupled to an output (4)...
US-8,284,530 Electrostatic discharge (ESD) protection circuit and related apparatus and method
An electrostatic discharge (ESD) protection circuit includes a control circuit configured to generate a signal indicating whether an input voltage on an...
US-8,284,085 Pipelined continuous-time sigma delta modulator
Traditionally, pipelined continuous-time (CT) sigma-delta modulators (SDM) have been difficult to build due at least in part to the difficulties in calibrating...
US-8,283,948 Capacitor nonlinearity correction
A sample-and-hold (S/H) circuit is provided. The S/H circuit generally comprises a sampling switch, a sampling capacitor, and a correction network. The sampling...
US-8,283,907 Boost regulator with pulse frequency mode of operation having substantially constant percentage output ripple...
A method includes receiving an input voltage at a voltage regulator and generating an output voltage using the voltage regulator, which includes an inductor....
US-8,283,665 Scan paths, stimulus, and header circuitry with command/frame marker outputs
Testing of integrated circuits is achieved by a test architecture utilizing a scan frame input shift register, a scan frame output shift register, a test...
US-8,283,224 Ammonia pre-treatment in the fabrication of a memory cell
A method of manufacturing a memory cell 200. The method comprises forming a memory stack 215. Forming the memory stack includes pre-treating an insulating layer...
US-8,281,262 Partitioning features of a single IC layer onto multiple photolithographic masks
One embodiment relates to a computer method of providing an electronic mask set for an integrated circuit (IC) layer. In the method, a first electronic mask is...
US-8,281,196 Device address port circuitry with local, group, and global outputs
The disclosure describes a novel method and apparatus for making device TAPs addressable to allow device TAPs to be accessed in a parallel arrangement without...
US-8,281,194 Scan path switch testing of output buffer with ESD
The peripheral circuitry (350, 360, ESD, BH) of an integrated circuit die on a wafer is tested without physically contacting the bond pads of the die.
US-8,280,375 System and method for managing radio link failures
A wireless transmit/receive unit (WTRU) (152) in a wireless communications system includes a transceiver (153) for transmitting and receiving data from a...
US-8,280,331 System and method for tuning FM synthesizer
A device is provided for dividing a clock signal by even and odd integers. The device includes a divider, a delay portion and a duty cycle corrector. The...
US-8,280,183 Noise robust contrast-enhancement engine employing IIR filters
A noise robust contrast-enhancement engine utilizes low-pass infinite-impulse-response filters for enhancing the contrast while preventing noise amplification...
US-8,279,549 System and method for setting bias for MR head
A device for setting a bias for a magneto-resistive (MR) head can include a counter configured to provide a count value that varies incrementally from a first...
US-8,279,160 LED driving element, backlight device, and backlight device driving method
An LED driving element that can perform black line insertion display without increasing the clock frequency. LED driving element 11 has first and second shift...
US-8,278,980 Enhancement of power management using dynamic voltage and frequency scaling and digital phase lock loop high...
An apparatus for clock/voltage scaling includes a device power manager arranged to supply a scalable frequency clock to an interface; a delay-locked loop,...
US-8,278,898 Auto-tuning power supply
An apparatus for and method of automatically tuning a voltage regulation control loop for a digitally controlled switch mode power supply is provided. The...
US-8,278,889 Adaptive rectifier architecture and method for switching regulators
An adjustable compensation offset voltage is applied to a comparator to vary turn-off timing of a synchronous rectifier. A comparator output indicates when...
US-8,278,683 Lateral insulated gate bipolar transistor
Current density in an insulated gate bipolar transistor (L-IGBT) may be increased by adding a second gate, and the corresponding MOS transistors, to the source...
US-8,278,142 Combined metallic bonding and molding for electronic assemblies including void-reduced underfill
A method for forming electronic assemblies includes providing a plurality of IC die each having IC bonding conductors and a workpiece having workpiece bonding...
US-8,277,768 System and method for production of high purity silicon solids and solids therefrom
Systems and methods and resulting compositions of matter including silicon solids from a mixture of silicon and water. The mixture is collected at a collection...
US-8,276,030 Scan distributor and parallel scan paths with controlled output buffer
Scan distributor, collector, and controller circuitry connect to the functional inputs and outputs of core circuitry on integrated circuits to provide testing...
US-8,275,475 Method and system for estimating frequency and amplitude change of spectral peaks
Methods, digital systems, and computer readable media are provided for estimating change of amplitude and frequency in a digital audio signal by transforming a...
US-8,275,342 Downconversion mixer
At very high frequencies, generally above 100 GHz, the performance of traditional radio frequency (RF) circuitry begins to significantly limit performance. An...
US-8,275,046 Fast macroblock structure decision using SAD discrepancy and its prediction mode
The present invention is a method to accelerate the frame/field decision by estimating more suitable structure using SAD (sum of absolute difference) between...
US-8,275,012 Laser diode read driver
A first transistor produces a first voltage in response to a first current signal. A first resistor is coupled between the first transistor and a low voltage...
US-8,274,553 System and method for displaying stereoscopic digital motion picture images
In accordance with the teachings of the present invention, a system and method for displaying stereoscopic digital motion picture images are provided. In a...
US-8,274,140 Semiconductor chip package assembly with deflection-resistant leadfingers
The invention relates to leadframes and semiconductor chip package assemblies using leadframes, and to methods for their assembly. A disclosed embodiment of the...
US-8,274,131 Isolation trench with rounded corners for BiCMOS process
A semiconductor device comprising a first transistor device (130) on or in a semiconductor substrate (115) and a second transistor device (132) on or in the...
US-8,273,645 Method to attain low defectivity fully silicided gates
A method of forming fully silicided (FUSI) gates in MOS transistors which is compatible with wet etch processes used in source/drain silicide formation is...
US-8,273,623 Integrated high voltage capacitor having capacitance uniformity structures and a method of manufacture therefor
The present invention provides an integrated high voltage capacitor, a method of manufacture therefore, and an integrated circuit chip including the same. The...
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