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Patent # Description
US-8,253,526 Termination compensation for differential signals on glass
A system for calibrating operation of integrated differential signal receiver circuitry mounted on a substrate and coupled via surface conductors to edge...
US-8,253,457 Delay locked loop with delay programmability
A delay locked loop (DLL) with delay programmability includes a pair of delay blocks, each containing multiple delay elements, but configurable to connect a...
US-8,253,435 Methods and apparatus to detect voltage conditions of power supplies
Methods and apparatus to detect voltage conditions of power supplies are disclosed. An example power supply monitor to detect fault conditions in a power supply...
US-8,253,399 Reconfigurable regulator and associated method
One embodiment of the invention includes a regulator system that includes a high-side power transistor electrically connected between a first node and a second...
US-8,253,389 Battery protection circuit and method for energy harvester circuit
Power management circuitry (7-2,3,4) for converting a harvested voltage (V.sub.hrv) to an output voltage (V.sub.BAT) applied to a battery (6) includes an...
US-8,253,205 Method for forming strained channel PMOS devices and integrated circuits therefrom
An integrated circuit (IC) includes a plurality of compressively strained PMOS transistors. The IC includes a substrate having a semiconductor surface. A gate...
US-8,253,193 MOS transistor with gate trench adjacent to drain extension field insulation
An integrated circuit containing an MOS transistor with a trenched gate abutting an isolation dielectric layer over a drift region. The body well and source...
US-8,253,091 Data interface for an optical device having a controller receiving image pixel state data over an optical link...
An optical device includes an array of optical elements located over a package substrate. A controller is also located over the package substrate. The...
US-8,252,609 Curvature reduction for semiconductor wafers
A method for reducing curvature of a wafer having a semiconductor surface. One or more process steps are identified at which wafers exhibit the largest...
US-8,250,421 Clock controller for JTAG interface
An optimized JTAG interface is used to access JTAG Tap Domains within an integrated circuit. The interface requires fewer pins than the conventional JTAG...
US-8,250,419 Multiplexer for tap controller and WSP controller outputs
In a first embodiment a TAP 318 of IEEE standard 1149.1 is allowed to commandeer control from a WSP 202 of IEEE standard P1500 such that the P1500 architecture,...
US-8,249,666 Battery-centric tamper resistant circuitry and portable electronic devices
Tamper-resistant circuitry for use with an electronic device is provided, where the electronic device comprises a plurality of connections for coupling the...
US-8,249,616 Satellite (GPS) assisted clock apparatus, circuits, systems and processes for cellular terminals on...
A wireless circuit (1100, 1190) for tracking an incoming signal and for use in a network (2000) having handover from one part (Cell A) of the network to another...
US-8,249,524 Transmit and receive performance of a near field communication device that uses a single antenna
A near field communication (NFC) transceiver contains a transmitter portion to generate a transmit wireless signal, and a receiver portion to receive and...
US-8,249,171 MPEG-2 transport stream packet synchronizer
A data synchronizer that receives an input stream of asynchronous digital data in packets, and provides an output stream of synchronous data in packets. The...
US-8,249,099 External memory data management with data regrouping and channel look ahead
A device manages data for a digital signal processor. The device includes an external random access memory (RAM), configured to store channel specific data for...
US-8,248,867 Memory cell employing reduced voltage
A memory array is provided having a memory cell coupled to a read word line and a write word line of the memory array and peripheral circuits for reading and...
US-8,248,290 Multiplexed amplifier with reduced glitching
In many applications, which use amplifiers that operate at less than 50% duty cycle, it would be advantageous to reduce the number amplifiers to reduce power...
US-8,248,289 Power and area efficient interleaved ADC
Pipeline analog-to-digital converters (ADCs) are commonly used for high frequency applications; however, operating at high sampling rates will often result in...
US-8,248,283 Multi-channel SAR ADC
For high voltage applications, multi-channel successive approximation register (SAR) analog-to-digital converters (ADCs) are often plagued with numerous...
US-8,248,282 Track and hold architecture with tunable bandwidth
To date, bandwidth mismatch within time-interleaved (TI) analog-to-digital converters (ADCs) has been largely ignored because compensation for bandwidth...
US-8,248,150 Passive bootstrapped charge pump for NMOS power device based regulators
A charge pump in a low dropout (LDO) regulator includes a first capacitor coupled to an output of an amplifier and to a gate of a pass transistor. A first...
US-8,248,134 Digital suppression of spikes on an I.sup.2C bus
An apparatus that is adapted to receive signals from an Inter-Integrated Circuit (I.sup.2C) bus is provided. The apparatus comprises a serial data (SDA) filter,...
US-8,248,118 High-speed frequency divider and a phase locked loop that uses the high-speed frequency divider
A frequency divider includes a least significant (LS) stage, multiple cascaded divider stages, and an output stage. The LS stage receives an input signal, a...
US-8,248,055 Voltage reference with improved linearity addressing variable impedance characteristics at output node
A voltage reference containing a programmable resistance portion at an output node at which an output reference voltage is provided. The desired magnitude of...
US-8,247,855 Enhanced local interconnects employing ferroelectric electrodes
A ferroelectric device employs ferroelectric electrodes as local interconnect(s). One or more circuit features are formed within or on a semiconductor body. A...
US-8,247,300 Control of dopant diffusion from buried layers in bipolar integrated circuits
An integrated circuit and method of fabricating the integrated circuit is disclosed. The integrated circuit includes vertical bipolar transistors (30, 50, 60),...
US-8,245,041 System and method for secure authentication of a "smart" battery by a host
Systems and methods for providing a battery module 110 with secure identity information and authentication of the identity of the battery 110 by a host 120. In...
US-8,245,011 Method and system for geometry-based virtual memory management in a tiled virtual memory
Methods and systems are provided for geometry-based virtual memory management. The methods and systems use Boolean space algebra operations to manage allocation...
US-8,244,198 Wireless device local oscillator generation apparatus and methods
Apparatus and methods disclosed herein operate to determine a base oscillator frequency and a frequency conversion factor associated with a radio receiver local...
US-8,243,843 Systems and methods for low-complexity MIMO detection using leaf-node prediction via look-up tables
A method for building a look-up table for a receiver in a multiple-input multiple-output (MIMO) detection system simulates a MIMO detector over many channel...
US-8,243,696 Joint processing downlink coordinated multi-point reference signal support
This invention concerns multiplexing in Long Term Evolution (LTE) and Long Term Evolution-Advanced (LTE-A) in Evolved Universal Terrestrial Radio Access Network...
US-8,242,770 Voltage sensing device
A voltage sensing device with which high-precision voltage sensing is possible without acquiring a unique correction constant for each device. A pair of voltage...
US-8,242,738 Systems and methods for determining battery parameters following active operation of the battery
When the load of a battery powered device is removed or significantly reduced, the voltage response may be recorded or analyzed in real time. The parameters of...
US-8,242,614 Thermally improved semiconductor QFN/SON package
A semiconductor device without cantilevered leads uses conductive wires (120) to connect the chip terminals to the leads (110), and a package compound (140) to...
US-8,239,814 Parameter drift prediction
A set of parameter drifts is recorded over a period of time for each of a series of stress tests on a system at various stress levels. Each set of the recorded...
US-8,239,673 Methods, apparatus and systems with loadable kernel architecture for processors
A device (200, 2200) for improved security includes a processor (200) and a secure writeable memory (2245) coupled to said processor (200) and including code...
US-8,238,429 Statistically cycle optimized bounding box for high definition video decoding
A method for conserving memory accesses in motion compensation of compressed video gathers a plurality of motion compensation data accesses into a single...
US-8,238,427 Rate distortion optimized adaptive intra refresh for video coding
A method of video coding comprising Intra prediction coding at least a predetermined constant M macroblocks within an ordinary frame. These M macroblocks...
US-8,238,406 Time-hopping sequence for burst mode communications
A method consisting of determining, by a symbol mapper, whether a previous burst position is below a threshold, wherein the previous burst position defines a...
US-8,238,158 Programming of memory cells in a nonvolatile memory using an active transition control
An electrically programmable non-volatile memory array and associated circuitry, including programming circuitry that adaptively senses completed programming of...
US-8,238,061 Printed circuit cable assembly with stiffener portions and flexible portions
A printed circuit cable assembly (PCCA) for a hard disk drive (HDD) is disclosed. The PCCA includes a stiffener portion having an elongated shape that includes...
US-8,238,010 MEMS device for producing a lemniscate pattern to counter zigzag effect
A MEMS device, a printer and a method of printing is presented including providing a light source producing a modulated beam of light, positioning a mirror with...
US-8,237,779 Coding scheme for digital video signals and an image architecture using the same
Video signals in a video stream are encoded by inserting reference signals in the video stream such that the encoded video stream carry both reference signals...
US-8,237,731 System and method for grouped pixel addressing
In accordance with the teachings of the present disclosure, a system and method for displaying an image are provided. In one embodiment, the method includes...
US-8,237,385 Systems and methods for detecting position for a brushless DC motor
A system for determining a commutation state for a brushless DC motor includes a controller configured to control current that is applied to drive each of a...
US-8,236,703 Methods for removing contaminants from aluminum-comprising bond pads and integrated circuits therefrom
Methods for removing contaminants from a semiconductor device that includes a plurality of aluminum-comprising bond pads on a semiconductor surface of a...
US-8,235,532 Color splitting method for light sources
A system comprises two or more light sources comprising a first light source and a second light source, each light source of the two or more light sources...
US-8,234,529 HTMLS with first and second select outputs and enable inputs
An integrated circuit can have plural core circuits, each having a test access port that is defined in IEEE standard 1149.1. Access to and control of these...
US-8,234,430 Apparatus and method with controlled switch method
An embedded microcontroller system comprises a central processing unit, a system controller for receiving and handling an interrupt, a register having storage...
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