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Patent # Description
US-8,248,283 Multi-channel SAR ADC
For high voltage applications, multi-channel successive approximation register (SAR) analog-to-digital converters (ADCs) are often plagued with numerous...
US-8,248,282 Track and hold architecture with tunable bandwidth
To date, bandwidth mismatch within time-interleaved (TI) analog-to-digital converters (ADCs) has been largely ignored because compensation for bandwidth...
US-8,248,150 Passive bootstrapped charge pump for NMOS power device based regulators
A charge pump in a low dropout (LDO) regulator includes a first capacitor coupled to an output of an amplifier and to a gate of a pass transistor. A first...
US-8,248,134 Digital suppression of spikes on an I.sup.2C bus
An apparatus that is adapted to receive signals from an Inter-Integrated Circuit (I.sup.2C) bus is provided. The apparatus comprises a serial data (SDA) filter,...
US-8,248,118 High-speed frequency divider and a phase locked loop that uses the high-speed frequency divider
A frequency divider includes a least significant (LS) stage, multiple cascaded divider stages, and an output stage. The LS stage receives an input signal, a...
US-8,248,055 Voltage reference with improved linearity addressing variable impedance characteristics at output node
A voltage reference containing a programmable resistance portion at an output node at which an output reference voltage is provided. The desired magnitude of...
US-8,247,855 Enhanced local interconnects employing ferroelectric electrodes
A ferroelectric device employs ferroelectric electrodes as local interconnect(s). One or more circuit features are formed within or on a semiconductor body. A...
US-8,247,300 Control of dopant diffusion from buried layers in bipolar integrated circuits
An integrated circuit and method of fabricating the integrated circuit is disclosed. The integrated circuit includes vertical bipolar transistors (30, 50, 60),...
US-8,245,041 System and method for secure authentication of a "smart" battery by a host
Systems and methods for providing a battery module 110 with secure identity information and authentication of the identity of the battery 110 by a host 120. In...
US-8,245,011 Method and system for geometry-based virtual memory management in a tiled virtual memory
Methods and systems are provided for geometry-based virtual memory management. The methods and systems use Boolean space algebra operations to manage allocation...
US-8,244,198 Wireless device local oscillator generation apparatus and methods
Apparatus and methods disclosed herein operate to determine a base oscillator frequency and a frequency conversion factor associated with a radio receiver local...
US-8,243,843 Systems and methods for low-complexity MIMO detection using leaf-node prediction via look-up tables
A method for building a look-up table for a receiver in a multiple-input multiple-output (MIMO) detection system simulates a MIMO detector over many channel...
US-8,243,696 Joint processing downlink coordinated multi-point reference signal support
This invention concerns multiplexing in Long Term Evolution (LTE) and Long Term Evolution-Advanced (LTE-A) in Evolved Universal Terrestrial Radio Access Network...
US-8,242,770 Voltage sensing device
A voltage sensing device with which high-precision voltage sensing is possible without acquiring a unique correction constant for each device. A pair of voltage...
US-8,242,738 Systems and methods for determining battery parameters following active operation of the battery
When the load of a battery powered device is removed or significantly reduced, the voltage response may be recorded or analyzed in real time. The parameters of...
US-8,242,614 Thermally improved semiconductor QFN/SON package
A semiconductor device without cantilevered leads uses conductive wires (120) to connect the chip terminals to the leads (110), and a package compound (140) to...
US-8,239,814 Parameter drift prediction
A set of parameter drifts is recorded over a period of time for each of a series of stress tests on a system at various stress levels. Each set of the recorded...
US-8,239,673 Methods, apparatus and systems with loadable kernel architecture for processors
A device (200, 2200) for improved security includes a processor (200) and a secure writeable memory (2245) coupled to said processor (200) and including code...
US-8,238,429 Statistically cycle optimized bounding box for high definition video decoding
A method for conserving memory accesses in motion compensation of compressed video gathers a plurality of motion compensation data accesses into a single...
US-8,238,427 Rate distortion optimized adaptive intra refresh for video coding
A method of video coding comprising Intra prediction coding at least a predetermined constant M macroblocks within an ordinary frame. These M macroblocks...
US-8,238,406 Time-hopping sequence for burst mode communications
A method consisting of determining, by a symbol mapper, whether a previous burst position is below a threshold, wherein the previous burst position defines a...
US-8,238,158 Programming of memory cells in a nonvolatile memory using an active transition control
An electrically programmable non-volatile memory array and associated circuitry, including programming circuitry that adaptively senses completed programming of...
US-8,238,061 Printed circuit cable assembly with stiffener portions and flexible portions
A printed circuit cable assembly (PCCA) for a hard disk drive (HDD) is disclosed. The PCCA includes a stiffener portion having an elongated shape that includes...
US-8,238,010 MEMS device for producing a lemniscate pattern to counter zigzag effect
A MEMS device, a printer and a method of printing is presented including providing a light source producing a modulated beam of light, positioning a mirror with...
US-8,237,779 Coding scheme for digital video signals and an image architecture using the same
Video signals in a video stream are encoded by inserting reference signals in the video stream such that the encoded video stream carry both reference signals...
US-8,237,731 System and method for grouped pixel addressing
In accordance with the teachings of the present disclosure, a system and method for displaying an image are provided. In one embodiment, the method includes...
US-8,237,385 Systems and methods for detecting position for a brushless DC motor
A system for determining a commutation state for a brushless DC motor includes a controller configured to control current that is applied to drive each of a...
US-8,236,703 Methods for removing contaminants from aluminum-comprising bond pads and integrated circuits therefrom
Methods for removing contaminants from a semiconductor device that includes a plurality of aluminum-comprising bond pads on a semiconductor surface of a...
US-8,235,532 Color splitting method for light sources
A system comprises two or more light sources comprising a first light source and a second light source, each light source of the two or more light sources...
US-8,234,529 HTMLS with first and second select outputs and enable inputs
An integrated circuit can have plural core circuits, each having a test access port that is defined in IEEE standard 1149.1. Access to and control of these...
US-8,234,430 Apparatus and method with controlled switch method
An embedded microcontroller system comprises a central processing unit, a system controller for receiving and handling an interrupt, a register having storage...
US-8,233,573 Dynamic optimization of overlap-and-add length
A method of performing overlap-and-add length for zero-padded suffixes. The method includes derotating received information symbol samples. The derotated...
US-8,233,556 Reduced feedback transmit beamforming
A method and system for reduced feedback transmit beamforming computes a matrix of channel transfer function coefficients. The matrix of channel transfer...
US-8,233,545 Run length encoding in VLIW architecture
A computer implemented method of video data encoding generates a mask having one bit corresponding each spatial frequency coefficient of a block during...
US-8,233,537 Efficient implementation of H.264 4 by 4 intra prediction on a VLIW processor
This invention is useful in video compression standards support a rich set of intra prediction modes. This invention a unique table creation and lookup approach...
US-8,233,341 Method and structure for SRAM cell trip voltage measurement
A parametric test circuit is disclosed (FIG. 6). The test circuit includes a latch circuit having true and complementary terminals. A first access transistor...
US-8,232,158 Compensated isolated p-well DENMOS devices
An integrated circuit with a core PMOS transistor formed in a first n-well and an isolated DENMOS (iso-DENMOS) transistor formed in a second n-well where the...
US-8,230,313 Low-power predecoding based viterbi decoding
In at least some disclosed embodiments, a system includes a Viterbi decoder and predecoding logic coupled to the Viterbi decoder. The predecoding logic decodes...
US-8,230,284 Integrated circuit having electrically isolatable test circuitry
Special test circuitry in an IC for wafer level testing selectively connects the specialized test circuitry to the functional circuitry during wafer test....
US-8,230,280 Source and destination data circuitry coupled to bi-directional TMS lead
The present disclosure describes using the JTAG Tap's TMS and/or TCK terminals as general purpose serial Input/Output (I/O) Manchester coded communication...
US-8,230,219 Reduced computation for bit-by-bit password verification in mutual authentication
Authentication methods are provided that allow for superior security, power consumption, and resource utilization over existing authentication methods. By...
US-8,228,980 Media gateway with overlay channels
A network media gateway is disclosed with a processor configured to include a plurality of decoder channels, a plurality of overlay channels, an overlay...
US-8,228,783 Base station transmitter for use with an OFDM communications system, a method of dynamically allocating OFDM...
A base station transmitter for use with an orthogonal frequency division multiplexing (OFDM) communications system, a method of dynamically allocating OFDM...
US-8,228,749 Margin testing of static random access memory cells
A static random access memory (SRAM) and method of evaluating the same for cell stability, write margin, and read current margin. The memory is constructed so...
US-8,228,629 Reaction control charge pump, capacitor, and transistor to power lead
The objective of this invention is to provide a motor control device, and a disk drive device using the same, in which during emergency operation it is possible...
US-8,228,395 Processing image frames in different formats with reduced memory requirements in digital still cameras
In a digital still camera, pixel values representing an image frame in a first format are stored in a memory. The pixel values of the image frame in the first...
US-8,228,130 Circuitry and method for precision amplitude control in quartz and MEMS oscillators
An oscillator includes oscillator circuitry (8) including a transconductance stage (2) and a resonator (3). A comparator (10) produces first (CLK) and second...
US-8,228,108 High speed fully differential resistor-based level formatter
A level formatter is provided that has differentially coupled closed loop current sources, each configured to precisely establish a current proportional to a...
US-8,228,092 High voltage latching and DC restoration isolation and level shifting method and apparatus
A device and method for dc isolation and level shifting includes a driver circuit powered by a first voltage range, a capacitor connected to the driver circuit,...
US-8,228,076 Deconvolution-based capacitive touch detection circuit and method
A capacitance measuring system includes analog-digital circuitry (15) coupled to row conductors (2i) and column conductors (3i) of a touch screen panel (13A)...
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