Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: texas instruments





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-8,587,349 Clock divider with multiple count signals
A clock divider circuit. The clock divider receives m input clock signals each of the same frequency. Each input clock signal after the first has a phase offset...
US-8,587,122 Semiconductor flip-chip system having three-dimensional solder joints
A solder joint between a trace (401) and an object (501). The trace having a solderable surface (503), a height (504), and a width (404), the trace including a...
US-8,587,099 Leadframe having selective planishing
A metal leadframe strip (500) for semiconductor devices is described. The leadframe strip has a plurality of sites (510) for assembling semiconductor chips. The...
US-8,586,395 Method and apparatus for reducing thermopile variations
Here, an apparatus is provided. The apparatus generally comprises a substrate and a thermopile. The thermopile includes a cavity that is etched into the...
US-8,586,130 Increasing exposure tool alignment signal strength for a ferroelectric capacitor layer
An improved alignment structure for photolithographic pattern alignment is disclosed. A topographical alignment mark in an IC under a low reflectivity layer may...
US-8,583,360 Usage mode determination of navigation system
A navigation system determines its usage mode. In some embodiments, a method comprises determining a usage mode of a navigation system based on at least one of...
US-8,582,908 Quantization method and apparatus
Quantization for oversampled signals with an error minimization searches based upon clusters of possible sampling vectors where the clusters have minimal...
US-8,582,699 Maintaining ADC input magnitude from digital par and peak value
Automatic gain control in a receiver. A method for controlling operating range of an analog-to-digital converter (ADC) by an automatic gain control circuit...
US-8,582,645 Reducing flicker in the display of video streams
Image frames of a video stream are encoded with the aim of reducing flicker in the video stream when displayed. In one embodiment, the quantization parameter...
US-8,582,550 Bounded power-save-polling (BPS)
In accordance with at least some embodiments, a system comprises an access point and a station in communication with the access point. The station has at least...
US-8,582,384 Process variability tolerant programmable memory controller for a pipelined memory system
In an embodiment of the invention, an integrated circuit includes a pipelined memory array and a memory control circuit. The pipelined memory array contains a...
US-8,582,032 Motion detection for interlaced video
Motion detection in interlaced video fields, as useful in de-interlacing, includes spatial-temporal maximum filtering, temporal IIR filtering dependent upon...
US-8,581,780 Concatenating free sections in memory that store satellite search signals
Enhancing search capacity of Global Navigation Satellite System (GNSS) receivers. A method for searching satellite signals in a receiver includes performing a...
US-8,581,770 Zero-power sampling SAR ADC circuit and method
A switched-capacitor circuit (10, 32 or 32A) samples a first signal (V.sub.IN.sup.+) onto a first capacitor (C1 or C.sub.IN1) by switching a top plate thereof...
US-8,581,660 Power transistor partial current sensing for high precision applications
A power transistor module including a power transistor with a first common power node, and a split control node. A first clip is connected to a portion of a...
US-8,581,640 Clock divider with a zero-count counter
A clock divider circuit. The clock divider receives m input clock signals each of the same frequency. Each input clock signal after the first has a phase offset...
US-8,581,634 Source follower input buffer
Traditionally, input source follower buffers for analog-to-digital converters (ADCs) lacked sufficiently high linearity. This was due in part to source follower...
US-8,581,629 Synchronous state machine with an aperiodic clock
An apparatus is provided. The apparatus includes an analog timing controller and a digital state machine. An input circuit in the digital state machine is...
US-8,581,324 Area-efficient electrically erasable programmable memory cell
Electrically erasable programmable "read-only" memory (EEPROM) cells in an integrated circuit, and formed by a single polysilicon level. The EEPROM cell...
US-8,581,317 SOI MuGFETs having single gate electrode level
A silicon on insulator (SOI) multi-gate field effect transistor electrically Programmable Read-Only Memory (MuFET EPROM) includes a substrate having a...
US-8,581,233 Variable capacitor single-electron transistor including a P-N junction gate electrode
The present invention provides a single-electron transistor device 100. The device comprises a source 105 and drain 110 located over a substrate 115 and a...
US-8,580,685 Integrated circuit having interleaved gridded features, mask set, and method for printing
A method for fabricating an integrated circuit includes the steps of: providing a substrate having a semiconductor surface; providing a hardmask material on the...
US-8,580,675 Two-track cross-connect in double-patterned structure using rectangular via
An integrated circuit may be formed by forming a first interconnect pattern in a first plurality of parallel route tracks, and forming a second interconnect...
US-8,580,663 Formation of shallow junctions by diffusion from a dielectronic doped by cluster or molecular ion beams
A process for forming diffused region less than 20 nanometers deep with an average doping dose above 10.sup.14 cm.sup.-2 in an IC substrate, particularly LDD...
US-8,580,650 Lateral superjunction extended drain MOS transistor
An integrated circuit containing an extended drain MOS transistor with deep semiconductor (SC) RESURF trenches in the drift region, in which each deep SC RESURF...
US-8,580,631 High sheet resistor in CMOS flow
An integrated circuit containing CMOS gates and a counterdoped polysilicon gate material resistor which has a body region that is implanted concurrently with...
US-8,578,225 One agumentation instruction register coupled to plural TAP instruction registers
An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test...
US-8,578,224 High density flip-flop with asynchronous reset
A master/slave latch includes an input stage, a master latch, a slave latch, and receives an asynchronous clear signal. The input stage is arranged to...
US-8,576,604 Identifying and correcting a bit error in a FRAM storage unit of a semiconductor device
An embodiment of semiconductor device including a control unit and an FRAM storage unit is disclosed. The FRAM storage unit contains FRAM cells. The control...
US-8,576,596 Systems and methods for off-time control in a voltage converter
Various embodiments of the present invention provide voltage converters and methods for using such. As one example, a voltage converter is disclosed that...
US-8,576,487 Spoke light recapture for the spoke between a color of a wheel and its neutral density complement
Disclosed is a video display system comprising a spatial light modulator, such as a DMD modulator. The system uses a light source and color-wheel filter that is...
US-8,576,007 High speed amplifier
For high speed amplifiers, the parasitic capacitances from the differential input pair introduce a zero that can affect performance. Here, a neutralization...
US-8,575,903 Voltage regulator that can operate with or without an external power transistor
A voltage regulator, according to the present invention, can operate with or without an external power transistor to generate a regulated output voltage. The...
US-8,575,845 Method and apparatus to measure light intensity
A method for controlling a light emitting diode (LED) is provided. Initially, the LED, which had been active, is deactivated, and a voltage for a current that...
US-8,575,758 Laser-assisted cleaving of a reconstituted wafer for stacked die assemblies
A method of forming stacked die devices includes attaching first semiconductor die onto a wafer to form a reconstituted wafer, and then bonding second...
US-8,575,752 Modulated deposition process for stress control in thick TiN films
A multi-layer TiN film with reduced tensile stress and discontinuous grain structure, and a method of fabricating the TiN film are disclosed. The TiN layers are...
US-8,575,020 Pattern-split decomposition strategy for double-patterned lithography process
An integrated circuit may be formed by a process of forming a first interconnect pattern in a plurality of parallel route tracks, and forming a second...
US-8,575,015 Lateral trench mosfet having a field plate
One embodiment relates to an integrated circuit that includes a lateral trench MOSFET disposed in a semiconductor body. The lateral trench MOSFET includes...
US-8,575,014 Semiconductor device fabricated using a metal microstructure control process
The invention provides a method for manufacturing a semiconductor device that comprises placing a metallic gate layer over a gate dielectric layer where the...
US-8,574,980 Method of forming fully silicided NMOS and PMOS semiconductor devices having independent polysilicon gate...
A method of forming fully silicided NMOS and PMOS semiconductor devices having independent polysilicon gate thicknesses, and related device. At least some of...
US-8,574,979 Method for integrating silicon germanium and carbon doped silicon with source/drain regions in a strained CMOS...
The disclosure provides a semiconductor device and method of manufacture therefore. The method for manufacturing the semiconductor device, in one embodiment,...
US-8,574,967 Method for fabricating array-molded package-on-package
An improved semiconductor device package is manufactured by attaching semiconductor chips (130) on an insulating substrate (101) having contact pads (103). A...
US-8,574,931 Singulation and strip testing of no-lead integrated circuit packages without tape frame
Strip testing is applied to a plurality of integrated circuit dies that are each encapsulated in an encapsulant, that each have a set of externally accessible...
US-8,572,541 Method and system for adaptive physical design
A method is provided that includes performing a free placement of a system design comprising a plurality of power domains, wherein the power domains are not...
US-8,572,446 Output circuitry with tri-state buffer and comparator circuitry
A test controller applies test stimulus signals to the input pads of plural die on a wafer in parallel. The test controller also applies encoded test response...
US-8,572,433 JTAG IC with commandable circuit controlling data register control router
The disclosure describes a novel method and apparatus for improving the operation of a TAP architecture in a device through the use of Command signal inputs to...
US-8,572,154 Reduced-level two's complement arithmetic unit
A processor includes a two's complement arithmetic unit that reduces a level of complexity in the critical path by eliminating the addition of the "1" to the...
US-8,571,611 System and method for wirelessly providing multimedia
System and method for wirelessly providing multimedia. A system includes a headset and a wireless communications device. The wireless communications device...
US-8,571,120 Transmission of acknowledge/not acknowledge (ACK/NACK) bits and their embedding in the reference signal
Transmitting a acknowledge/not acknowledge (ACK/NACK) response in a wireless cellular network by mapping the data value into a cyclic shifted version of a...
US-8,571,092 Interconnect coding method and apparatus
A computer program that is embodied on a storage medium for execution on a processor is provided. With this computer program, A current cost is calculated for...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.