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Patent # Description
US-8,124,511 Method of manufacturing a semiconductor device having reduced N/P or P/N junction crystal disorder
One aspect provides a method of manufacturing a semiconductor device having reduced N/P or P/N junction crystal disorder. In one aspect, this improvement is...
US-8,124,486 Method to enhance channel stress in CMOS processes
The invention provides a method of fabricating a semiconductor device that enhances the amount of stress that is transmitted to the channel region for carrier...
US-8,124,482 MOS transistor with gate trench adjacent to drain extension field insulation
An integrated circuit containing an MOS transistor with a trenched gate abutting an isolation dielectric layer over a drift region. The body well and source...
US-8,124,321 Etching method for use in deep-ultraviolet lithography
In a lithography process using an ultraviolet process, the applied ultraviolet resist can be removed by intentionally condensing the ultraviolet resist before...
US-8,122,311 Apparatus and method for clock signal synchronization in JTAG testing in systems having selectable modules...
In a test and debug system in which a plurality of selectable modules under test have different operational rates, a selection unit associated with each module...
US-8,122,310 Input buffer, test switches and switch control with serial I/O
The peripheral circuitry (350, 360, ESD, BH) of an integrated circuit die on a wafer is tested without physically contacting the bond pads of the die.
US-8,122,244 Secure management of configuration parameters in a computing platform
A computing platform (10) protects system firmware (30) using a manufacturer certificate (36). The manufacturer certificate binds the system firmware (30) to...
US-8,121,835 Automatic level control of speech signals
Automatic level control of speech portions of an audio signal is provided. An audio signal is received in the form of a sequence of samples and may contain...
US-8,121,576 Linearity of an RF receive path by spurious tone suppression
A method of increasing linearity of an RF signal receive path includes measuring a signal amplified by the receive path. The receive path has a local oscillator...
US-8,121,561 Power tuning system and method for power amplifier
An automatic power tuning system and method, and a transmitter employing either the system or the method. In one embodiment, the system includes: (1) a power...
US-8,121,558 Local oscillator generator architecture using a wide tuning range oscillator
A local oscillator (LO) generator architecture using a wide tuning range oscillator is disclosed. In one embodiment, a wide tuning oscillator based LO generator...
US-8,121,482 Spatial light modulator-based reconfigurable optical add-drop multiplexer and method of adding an optical...
A reconfigurable optical add-drop multiplexer (ROADM) and a method of passing at least one optical channel through the multiplexer. In one embodiment, the...
US-8,121,299 Method and system for music detection
Methods, digital systems, and computer readable media are provided for detection of music in an audio signal. Music is detected by partitioning the audio signal...
US-8,121,214 Local oscillator with non-harmonic ratio between oscillator and RF frequencies using XOR operation
A novel and useful apparatus for and method of local oscillator (LO) generation with non-integer multiplication ratio between the local oscillator and RF...
US-8,121,194 Fast macroblock encoding with the early qualification of skip prediction mode using its temporal coherence
The latest video-coding standards achieve higher coding efficiency than the previous video standards, while increasing the complexity and the difficulty of...
US-8,120,884 Reverse voltage protection circuit
A voltage protection circuit that has a protection transistor coupled between a voltage supply pin of an integrated circuit and a voltage output terminal of the...
US-8,120,439 Fast start-up crystal oscillator
An exemplary fast start-up crystal oscillator with reduced start-up time. The exemplary oscillator reduces the start-up time (i.e., the time taken to attain...
US-8,120,425 System and method for common mode translation
System and method for common mode translation in continuous-time sigma-delta analog-to-digital converters. An embodiment includes a loop filter having an RC...
US-8,120,417 Transfer-function control in an active filter
A filter circuit includes a differential amplifier circuit to provide a number of poles including a dominant pole, and a feedback circuit to feed a portion of...
US-8,120,395 Use of data decisions for temporal placement of samplers
A data receiver has a clock recovery and data sampling circuit. This has a fixed local oscillator for timing the data samples. A phase interpolator adjusts the...
US-8,120,389 Digital to frequency synthesis using flying-adder with dithered command input
To make Flying-Adder architecture even more powerful, a new concept, time-average-frequency, is incorporated into the clock generation circuitry. This is a...
US-8,120,334 System and method for phase management in a multiphase switching power supply
A system and method for managing phases in a multiphase switching power supply turns off a phase in light load conditions and turns on a phase in heavier load...
US-8,120,283 LED device and LED driver
A LED device having a LED array, LED driver ICs, DC-DC converter, a first feedback circuit consisting of voltage dividing resistors, and a headroom voltage...
US-8,120,281 Light beam control system for a spatial light modulator
According to one embodiment of the disclosure, a light beam control system includes a positive intrinsic negative diode coupled to a controller circuit. The...
US-8,120,209 Voltage sensing device for an individual cell of a group of battery cells
A voltage sensing device with which high-precision voltage sensing is possible without the need to obtain a unique correction constant for each device. A pair...
US-8,120,155 Reduced stiction and mechanical memory in MEMS devices
A MEMS device is packaged in a process which hydrogen (H) deuterium (D) for reduced stiction. H is exchanged with D by exposing the MEMS device with a deuterium...
US-8,120,108 High voltage SCRMOS in BiCMOS process technologies
An integrated circuit having an SCRMOS transistor with a RESURF region around the drain region and SCR terminal. The RESURF region is the same conductivity type...
US-8,119,470 Mitigation of gate to contact capacitance in CMOS flow
Sidewall spacers that are primarily oxide, instead of nitride, are formed adjacent to a gate stack of a CMOS transistor. Individual sidewall spacers are...
US-8,117,428 Apparatus and method for automatically saving and restoring pad configuration registers implemented in a core...
According to various illustrative embodiments, an apparatus, system, and method for automatically saving and restoring pad configuration registers implemented...
US-8,117,422 Fast address translation for linear and circular modes
The core of this invention is the application of a fast comparison circuit to the problem of address translation. Traditional implementations generate the...
US-8,117,398 Prefetch termination at powered down memory bank boundary in shared memory controller
A prefetch scheme in a shared memory multiprocessor disables the prefetch when an address falls within a powered down memory bank. A register stores a bit...
US-8,117,367 Processor system with an application and a maintenance function
A processor system with an application and a maintenance function that would interfere with the application if concurrently executed. The processor system...
US-8,116,371 VLC technique for layered video coding using distinct element grouping
The layered coding technique is employed to achieve the image quality scalability for video coding standards. The desired image quality scalability can be...
US-8,116,005 Light combiner
For combining light from different light sources in a light source, dichroic filters are displaced individually according to the physical arrangement of the...
US-8,115,866 Method for detecting film pulldown cadences
Given an incoming stream of interlaced video, data for each field is analyzed to detect a progressive frame cadence. If a progressive frame cadence is detected,...
US-8,115,523 Circuit to spread the spectrum of a PWM signal
An apparatus is provided. The apparatus comprises a first current source and a second current source that charge and discharge a capacitor. Coupled between the...
US-8,115,464 Boost circuit and power supply device
The objective of this invention is to provide a boost circuit that reduces power consumption and prevents malfunctioning when the input voltage becomes greater...
US-8,115,463 Compensation of LDO regulator using parallel signal path with fractional frequency response
A low drop out (LDO) voltage regulator (10) includes a pass transistor (MP.sub.pass) having a source coupled by an output conductor (4) to a load and a drain...
US-8,115,461 Power supply circuit and battery device
A power supply circuit with low noise and low power consumption and a battery device using the power supply circuit. If a voltage VDD is higher than a...
US-8,115,453 Method and apparatus for managing energy in plural energy storage units
A system for managing energy stored in a plurality of series connected energy storage units has a plurality of energy storage unit controllers, each controller...
US-8,115,345 Variable timing switching system and method
A low-EMI switched circuit comprises two or more switches, wherein impedance transitions of the switches are overlapped and the overlap is varied using variable...
US-8,115,337 Soft-start circuit
An apparatus is provided. The apparatus comprises an input circuit, a startup circuit, and a current limiter. The input circuit is coupled to a first source and...
US-8,115,310 Copper pillar bonding for fine pitch flip chip devices
A semiconductor device assembly can include a semiconductor chip, a receiving substrate, and a spacer structure interposed between the semiconductor chip and...
US-8,115,272 Silicon dioxide cantilever support and method for silicon etched structures
An apparatus includes a semiconductor layer (2) having therein a cavity (4). A dielectric layer (3) is formed on the semiconductor layer. A plurality of etchant...
US-8,114,784 Laminated stress overlayer using In-situ multiple plasma treatments for transistor improvement
Integrated circuits (ICs) commonly contain pre-metal dielectric (PMD) liners with compressive stress to increase electron and hole mobilities in MOS...
US-8,114,779 Silicon dioxide cantilever support and method for silicon etched structures
An apparatus includes a semiconductor layer (2) having therein a cavity (4). A dielectric layer (3) is formed on the semiconductor layer. A plurality of etchant...
US-8,114,744 Methods for reducing gate dielectric thinning on trench isolation edges and integrated circuits therefrom
A method of fabricating an integrated circuit (IC) including a plurality of MOS transistors and ICs therefrom include providing a substrate having a silicon...
US-8,114,731 Integrated high voltage capacitor having capacitance uniformity structures and a method of manufacture therefor
The present invention provides an integrated high voltage capacitor, a method of manufacture therefore, and an integrated circuit chip including the same. The...
US-8,114,729 Differential poly doping and circuits therefrom
A method of fabricating a CMOS integrated circuit and integrated circuits therefrom includes the steps of providing a substrate having a semiconductor surface,...
US-8,114,728 Integration scheme for an NMOS metal gate
A method for making an NMOS transistor on a semiconductor substrate includes reducing the thickness of the PMD layer to expose the polysilicon gate electrode of...
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