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Patent # Description
US-9,741,791 Latchup reduction by grown orthogonal substrates
An integrated circuit is formed by providing a heavily doped substrate of a first conductivity type, forming a lightly doped lower epitaxial layer of the first...
US-9,741,790 Method for creating the high voltage complementary BJT with lateral collector on bulk substrate with resurf effect
Complementary high-voltage bipolar transistors formed in standard bulk silicon integrated circuits are disclosed. In one disclosed embodiment, collector regions...
US-9,741,787 Methods and apparatus for high voltage integrated circuit capacitors
High voltage integrated circuit capacitors are disclosed. In an example arrangement. A capacitor structure includes a semiconductor substrate; a bottom plate...
US-9,741,724 SRAM well-tie with an uninterrupted grated first poly and first contact patterns in a bit cell array
An integrated circuit containing an SRAM may be formed using one or more periodic photolithographic patterns for elements of the integrated circuit such as...
US-9,741,718 High voltage CMOS with triple gate oxide
An integrated circuit containing a first plurality of MOS transistors operating in a low voltage range, and a second plurality of MOS transistors operating in a...
US-9,741,643 Leadframe strip with vertically offset die attach pads between adjacent vertical leadframe columns
A leadframe strip for use in making leaded integrated circuit packages includes a plurality of integrally connected leadframes that each have a die attach pad...
US-9,741,624 Spacer shaper formation with conformal dielectric film for void free PMD gap fill
An integrated circuit may be formed by removing source/drain spacers from offset spacers on sidewalls of MOS transistor gates, forming a contact etch stop layer...
US-9,741,557 Silicon nitride process for reduction of threshold shift
A semiconductor device has a substrate with a semiconductor material. The semiconductor device includes a field effect transistor in and on the semiconductor...
US-9,741,430 Static random access memory with reduced write power
A static random access memory (SRAM) features reduced write cycle power consumption. The SRAM includes an array of static storage cells and a write controller....
US-9,741,358 Method and system for interference suppression using blind source separation
A method of interference suppression is provided that includes receiving a first audio signal from a first audio capture device and a second audio signal from a...
US-9,740,887 Methods and systems to restrict usage of a DMA channel
In at least some embodiments, a system comprises a processor and a direct memory access (DMA) subsystem coupled to the processor. The system further comprises a...
US-9,740,261 USB power delivery dead-battery control
A method of power delivery. Port controllers each include a state machine, an IO pin, a receptacle supply pin receiving power from a receptacle, and a gate...
US-9,740,236 Dual window watchdog timer
Systems and methods for a Dual Window Watchdog Timer (DWWDT) are described. In some embodiments, a method may include running a first counter in a first clock...
US-9,739,832 Test messaging demodulate and modulate on separate power pads
The present disclosure describes a novel method and apparatus for using a device's power and ground terminals as a test and/or debug interface for the device....
US-9,738,339 Side stand indicator for a two-wheel vehicle
A two-wheel vehicle includes a frame and a metallic side stand, rotatable within a bracket attached to the frame. The metallic side stand is rotatable between a...
US-9,736,898 Circuit and method for driving a light-emitting diode
Circuits and methods for driving an LED from a secondary side of a transformer are disclosed herein. An embodiment of the method includes monitoring an input...
US-9,735,844 Channel feedback for coordinated multi-point transmissions
A method of Coordinated Multipoint (CoMP) communication between a base station having a plurality of points with at least one user equipment (UE). At least one...
US-9,735,802 Overload detection and correction in delta-sigma analog-to-digital conversion
A voltage-controlled oscillator-based delta-sigma analog-to-digital converter (VCO-based .DELTA..SIGMA. ADC) includes a VCO-based quantizer that includes delay...
US-9,735,794 Analog-to-digital converter with an increased resolution first stage
One example includes a pipelined analog-to-digital converter device. The pipelined analog-to-digital converter device includes a capacitive digital-to-analog...
US-9,735,753 Baluns for RF signal conversion and impedance matching
A magnetically-coupled structure is integrated with an integrated circuit in back end-of-line (BEOL) digital CMOS fabrication processes. A differential primary...
US-9,735,600 Method for limiting battery discharging current in battery charger and discharger circuit
A power supply system includes a rechargeable battery to deliver a supply current to a load and a circuit to limit a discharge current when the rechargeable...
US-9,735,265 Reduced area power devices using deep trench isolation
An integrated circuit including an isolated device which is isolated with a lower buried layer combined with deep trench isolation. An upper buried layer, with...
US-9,735,172 Method to match SOI transistors using a local heater element
An integrated circuit with a matched transistor pair with a matching resistance heater coupled to each transistor of the matched transistor pair. A method for...
US-9,735,159 Optimized layout for relaxed and strained liner in single stress liner technology
An integrated circuit and method with a single stress liner film and a stress relief implant where the distance of the stress relief implant to the transistors...
US-9,734,896 Circuits and methods for performance optimization of SRAM memory
In described examples, a memory controller circuit controls accesses to an SRAM circuit. Precharge mode control circuitry outputs: a burst mode enable signal to...
US-9,734,429 Method, system and computer program product for detecting an obstacle with a camera
For detecting an obstacle with a camera, a first image is viewed by the camera at a first location during a first time. Points on a surface would project onto...
US-9,734,265 Method and apparatus having enhanced oscillator phase noise using high Vt MOS devices
A voltage-controlled oscillator (VCO), includes a resonator circuit connected to receive an input voltage and having a first output node and a second output...
US-9,733,696 Dynamic low power states characterization
An optimal idle state of a processor is selected using dynamically derived parameters. For example, the idle state is selected from a group of possible idle...
US-9,733,340 Techniques for high arrival angle resolution using multiple nano-radars
A device includes a circuit board having thereon, a controlling component, a first radar chip and a second radar chip. The first radar chip includes a first...
US-9,733,308 Tap, CMD with two flip-flops, routing circuit, and data register
This disclosure describes different ways to improve the operation of a device's 1149.1 TAP to where the TAP can perform at-speed Update & Capture, Shift &...
US-9,733,231 Spectrographic material analysis using multi-frequency inductive sensing
A multi-frequency inductive sensing system can be used for spectrographic material analysis of a conductive target material (such as tissue) based on electrical...
US-9,733,061 Distance determination based on reflected admittance
A distance measurement system includes a tank circuit including a transmit coil coupled to a transmit capacitor, a distance calculation circuit coupled to the...
US-9,729,968 Method and system for acoustic echo cancellation using cascaded kalman filtering
A method and a system for echo cancellation. The method includes receiving incoming downlink signal sample, performing Kalman filter time update of linear...
US-9,728,423 Piezoelectric thin film process
A process of forming an integrated circuit containing a piezoelectric thin film by forming a sol gel layer, drying in at least 1 percent relative humidity,...
US-9,726,697 Coupled inductor current sensing apparatus and systems
A voltage proportional to a sum of currents flowing though first and second coupled inductors is developed across a first capacitor common to first and second...
US-9,723,327 Luma-based chroma intra-prediction for video coding
A method for luma-based chroma intra-prediction in a video encoder or a video decoder is provided that includes filtering reconstructed neighboring samples of a...
US-9,723,278 Color display projection method and apparatus
A multi-DMD projection system uses an extended X-cube color splitting/recombining prism to implement splitting and recombining functions at different sections...
US-9,717,426 Optical receiver chain for components of a photoplethysmograph signal
The circuitry of an optical receiver reduces the ambient DC component and the pleth DC component to leave a pleth signal with substantially only a pleth AC...
US-9,717,423 Low-complexity sensor displacement tolerant pulse oximetry based heart rate measurement
Methods for heart rate measurement based on pulse oximetry are provided that can tolerate some degree of relative displacement of a photoplethysmograph (PPG)...
US-9,716,514 Delta sigma modulator with modified DWA block
The disclosure provides a delta sigma modulator. The delta sigma modulator includes a summer. The summer generates an error signal in response to an input...
US-9,715,911 Nonvolatile backup of a machine state when a power supply drops below a threshhold
Input power quality for a processing device is sensed. In response to detection of poor power quality, input power is disconnected, and the processing device...
US-9,712,439 Packet processing match and action unit with configurable memory allocation
A packet processing block. The block comprises an input for receiving data in a packet header vector, the vector comprising data values representing information...
US-9,712,059 Directly amplified ripple tracking control scheme for multiphase DC-DC converter
A controller for a multiphase power converter has a plurality of DC to DC converters coupled in parallel between a voltage source and a single output terminal...
US-9,711,711 Piecewise piezoelectric energy harvester
A piezoelectric energy harvester device has a cantilevered structure with a rectangular proof mass portion defined by holes through a substrate along three...
US-9,711,643 ESD robust MOS device
A semiconductor device includes a body and a transistor fabricated into the body. Isolation material at least partially encases the body. Biasing is coupled to...
US-9,711,196 Configuration bit sequencing control of nonvolatile domain and array wakeup and backup
A processing device includes a plurality of non-volatile logic element array domains having two or more non-volatile logic element arrays to store 2006 a...
US-9,710,411 Signal conditioner
A signal conditioner can include a state machine configured to detect a predetermined protocol level mode of a data signal on a bi-directional serial bus. The...
US-9,710,318 Endian configuration memory and ECC protecting processor endianess mode circuit
An electronic circuit includes a microcontroller processor (410), a peripheral (420) coupled with the processor, an endian circuit (470) coupled with the...
US-9,709,802 Micromirror apparatus and methods
In described examples, a DMD includes an array of micromirror pixels. Each pixel includes a right electrode on a first side of the pixel, a left electrode on a...
US-9,709,627 Interposer with TAP, trigger, address/data bus, and analog monitor circuitry
The disclosure describes a novel method and apparatus for improving interposers to include embedded monitoring instruments for real time monitoring digital...
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