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Deinterleaving transpose circuits in digital display systems
The present invention provides a method and apparatus of converting a stream of pixel data in space and time into a stream of bitplane data. In particular, the...
Median and mean coherent filter and method for eliminating noise in touch
A touch screen system includes a touch screen assembly (30,31) and a touch screen controller (1A) coupled to terminals (24,25,26,27) of the touch screen...
Multistage chopper stabilized delta-sigma ADC with reduced offset
A relatively low frequency chopping operation is applied to a delta-sigma ADC to reduce DC offsets resulting from non-ideal component operation. Sequential...
Current canceling variable gain amplifier and transmitter using same
A current canceling CMOS variable gain amplifier includes a first leg and a second leg. The first leg has a first input line, a first output line, a first ON...
Digital suppression of spikes on an 1.sup.2C bus
An apparatus that is adapted to receive signals from an Inter-Integrated Circuit (I.sup.2C) bus is provided. The apparatus comprises a serial data (SDA) filter,...
Systems and methods of overvoltage and undervoltage detection
Systems and methods for overvoltage and undervoltage detection may be implemented with a fully differential circuit that includes a coarse comparator and a band...
Interleaved power factor correction pre-regulator phase management
Methods for power factor correction (PFC) and for reducing conduction losses and switching losses in a power converter as well as the power converter and phase...
DC-DC converter usable for dual voltage supply
A converter has a single inductor with a first terminal connectable to a first terminal of the supply input through a first power transistor and a second...
Photodiode semiconductor device and manufacturing method
The invention provides a semiconductor device manufactured with a plurality of photodiodes so that it does not short circuit, and includes an opening without...
Systems and methods for removing wafer edge residue and debris using a
residue remover mechanism
A system (500) removes wafer edge residue from a target wafer (508). A wafer holding mechanism (502) holds and rotates the target wafer (508). A residue remover...
Electrically conductive protection layer and a microelectromechanical
device using the same
A deformable hinge for use in microelectromechanical devices comprises a protection layer that is electrically conductive. The protection layer is on top of...
Adaptor With Clocks For Like Parts of Different Scan Paths
Scan architectures are commonly used to test digital circuitry in integrated circuits. The present disclosure describes a method of adapting conventional scan...
Software controlled CPU pipeline protection
A processor in a digital system executes instructions in an instruction execution pipeline. The processor detects a pipeline protection directive while...
Dynamic interpolation location
Apparatus and method for optimizing interpolation in the despreader data-path of a wireless telecommunications network employing Code Division Multiple Access...
Integrated ESD protection device
An integrated electrostatic discharge (ESD) device includes a first ESD structure coupled to a pad terminal of the integrated ESD device and a second ESD...
Color light combiner
For combining light from different light sources that are spatially apart, an optical system comprises a prism assembly that comprises a ...
System and method for actuation of spatial light modulators
A system comprises a spatial light modulator comprising a plurality of modulation elements, the spatial light modulator operable to receive an optical signal...
Angle diversity antispeckling in spot displays
Improvement of speckling noise is discussed in which a central light beam received at a double-sided mirror is divided into a plurality of sub-beams. An...
Optimized phase alignment in analog-to-digital conversion of video signals
A digital video system (2) is disclosed, in which an analog input video signal is sampled at an optimum sample phase (P.sub.nc), and converted to a digital...
One embodiment of the invention includes a level-shifter circuit. The circuit comprises a control stage that steers a current from one of a first control node...
Device and method for an antireflective coating to improve image quality in an image display system. A preferred embodiment comprises a first high refractive...
Low stress sacrificial cap layer
A low stress sacrificial cap layer 120 having a silicon oxide liner film 130, a low stress silicon film 140, and a silicon nitride film. Alternatively, a low...
Prism for high contrast projection
Prism elements having TIR surfaces placed in close proximity to the active area of a SLM device to separate unwanted off-state and/or flat-state light from the...
Automatic scan format selection based on scan topology selection
A method for specifying a signaling protocol to be used by a controller in a group of controllers connected with shared signaling is provided in which the...
Selecting a scan topology
A controller that shares an interface with several other controllers connected in a scan topology in a target system may be selected by receiving a selection...
Monitoring of memory and external events
A system comprises a circuit configured to execute instructions and output event data corresponding to the execution of the instructions. The system also...
Visualizing contents and states of hierarchical storage systems
An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is...
Cell specific sounding reference signal sub-frame configuration
A method of wireless communication including a plurality of fixed base stations and a plurality of mobile user equipment with each base station transmitting to...
Supervision circuit to detect very fast power supply drops
This invention is power supply protection for complex digital circuits employing an external high voltage supply and an internally generated low voltage core...
Interlaced-to-progressive conversion with (1) 3-2 pulldown detection, (2) pre-filtering for field motion detection, (3) field motion detection with feedback,...
An apparatus is provided. The apparatus comprises a first bipolar junction transistor (BJT) differential pair having a first BJT and a second BJT, a second BJT...
Adaptive algorithm for camera flash LED power control vs. battery
impedance, state of discharge (SOD), aging,...
A method for driving a light-emitting semiconductor is provided. A supply voltage is converted into a secondary output voltage for supplying the light-emitting...
Heat extraction from packaged semiconductor chips, scalable with chip area
A semiconductor device (100A) with plastic encapsulation compound (102) and metal sheets (103a and 104) on both surfaces, acting as heat spreaders. One or more...
Integration of high voltage JFET in linear bipolar CMOS process
A dual channel JFET which can be integrated in an IC without adding process steps is disclosed. Pinch-off voltage is determined by lateral width of a first,...
Method of using electrical test structure for semiconductor trench depth
Embodiments provide a method and device for electrically monitoring trench depths in semiconductor devices. To electrically measure a trench depth, a pinch...
Sub-resolution assist feature to improve symmetry for contact hole
A method of making a mask design having optical proximity correction features is provided. The method can include obtaining a target pattern comprising a...
Determining operating context of an executed instruction
Determining operating context of an executed instruction. At least some of the illustrative embodiments are a computer-readable medium storing a debug-trace...
Systems and methods for selecting wafer processing order for cyclical two
pattern defect detection
A method of sequencing wafer processing order to minimize sequence correlation in a cyclical two pattern model by generating a set of sequences of wafer...
SRAM cell with read buffer controlled for low leakage current
A functional memory of the integrated circuit includes row and column periphery units and an array of memory cells having a core storage element and a read...
Method and apparatus for detecting a cable in a redriver
With conventional redrivers used for external Serial Advanced Technology Attachment (eSATA), there is no ability to indicated to a host that an external device...
High-voltage variable breakdown voltage (BV) diode for electrostatic
discharge (ESD) applications
Formation of an electrostatic discharge (ESD) protection device having a desired breakdown voltage (BV) is disclosed. The breakdown voltage (BV) of the device...
Transistor layout for manufacturing process control
A symmetrical circuit is disclosed (FIG. 4). The circuit includes a first transistor (220) having a first channel in a substantial shape of a parallelogram...
Ferroelectric capacitor manufacturing process
A method of manufacturing a semiconductor device. The method comprises forming conductive and ferroelectric material layers on a semiconductor substrate. The...
System and method for making photomasks
The present disclosure is directed a method for preparing photomask patterns. The method comprises receiving drawn pattern data for a design database, the drawn...
Saving debugging contexts with periodic built-in self-test execution
A system comprises built-in self-test (BIST) logic configured to perform a BIST, processing logic coupled to the BIST logic and storage logic coupled to the...
IC multiplexer control circuitry for tap selection circuitry
Today many instances of IEEE 1149.1 Tap domains are included in integrated circuits (ICs). While all TAP domains may be serially connected on a scan path that...
Series equivalent scans across multiple scan topologies
Performing series equivalent scans spanning a plurality of scan technologies in a complex scan topology may be performed by performing shift operations in the...
System and method for sharing a communications link between multiple
A system and method for sharing a communications link between multiple protocols is described that comprises a system comprising a communications interface...
TAM with scan frame copy register coupled with serial output
Testing of an electrical device is achieved by providing a test access mechanism within the device that can receive scan frames from an external tester. The...
Memory bus shared system
The invention reduces the pin terminal number of a controller that in parallel or simultaneously accesses a synchronous memory and an asynchronous memory. When...