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Patent # Description
US-7,994,819 Level-shifter circuit
One embodiment of the invention includes a level-shifter circuit. The circuit comprises a control stage that steers a current from one of a first control node...
US-7,994,600 Antireflective coating
Device and method for an antireflective coating to improve image quality in an image display system. A preferred embodiment comprises a first high refractive...
US-7,994,073 Low stress sacrificial cap layer
A low stress sacrificial cap layer 120 having a silicon oxide liner film 130, a low stress silicon film 140, and a silicon nitride film. Alternatively, a low...
US-7,993,014 Prism for high contrast projection
Prism elements having TIR surfaces placed in close proximity to the active area of a SLM device to separate unwanted off-state and/or flat-state light from the...
US-7,992,065 Automatic scan format selection based on scan topology selection
A method for specifying a signaling protocol to be used by a controller in a group of controllers connected with shared signaling is provided in which the...
US-7,992,064 Selecting a scan topology
A controller that shares an interface with several other controllers connected in a scan topology in a target system may be selected by receiving a selection...
US-7,992,049 Monitoring of memory and external events
A system comprises a circuit configured to execute instructions and output event data corresponding to the execution of the instructions. The system also...
US-7,991,959 Visualizing contents and states of hierarchical storage systems
An information carrier medium containing software that, when executed by a processor, causes the processor to receive information from circuit logic that is...
US-7,990,916 Cell specific sounding reference signal sub-frame configuration
A method of wireless communication including a plurality of fixed base stations and a plurality of mobile user equipment with each base station transmitting to...
US-7,990,672 Supervision circuit to detect very fast power supply drops
This invention is power supply protection for complex digital circuits employing an external high voltage supply and an internally generated low voltage core...
US-7,990,471 Interlaced-to-progressive video
Interlaced-to-progressive conversion with (1) 3-2 pulldown detection, (2) pre-filtering for field motion detection, (3) field motion detection with feedback,...
US-7,990,188 Clock buffer
An apparatus is provided. The apparatus comprises a first bipolar junction transistor (BJT) differential pair having a first BJT and a second BJT, a second BJT...
US-7,990,074 Adaptive algorithm for camera flash LED power control vs. battery impedance, state of discharge (SOD), aging,...
A method for driving a light-emitting semiconductor is provided. A supply voltage is converted into a secondary output voltage for supplying the light-emitting...
US-7,989,949 Heat extraction from packaged semiconductor chips, scalable with chip area
A semiconductor device (100A) with plastic encapsulation compound (102) and metal sheets (103a and 104) on both surfaces, acting as heat spreaders. One or more...
US-7,989,853 Integration of high voltage JFET in linear bipolar CMOS process
A dual channel JFET which can be integrated in an IC without adding process steps is disclosed. Pinch-off voltage is determined by lateral width of a first,...
US-7,989,232 Method of using electrical test structure for semiconductor trench depth monitor
Embodiments provide a method and device for electrically monitoring trench depths in semiconductor devices. To electrically measure a trench depth, a pinch...
US-7,987,436 Sub-resolution assist feature to improve symmetry for contact hole lithography
A method of making a mask design having optical proximity correction features is provided. The method can include obtaining a target pattern comprising a...
US-7,987,393 Determining operating context of an executed instruction
Determining operating context of an executed instruction. At least some of the illustrative embodiments are a computer-readable medium storing a debug-trace...
US-7,987,014 Systems and methods for selecting wafer processing order for cyclical two pattern defect detection
A method of sequencing wafer processing order to minimize sequence correlation in a cyclical two pattern model by generating a set of sequences of wafer...
US-7,986,566 SRAM cell with read buffer controlled for low leakage current
A functional memory of the integrated circuit includes row and column periphery units and an array of memory cells having a core storage element and a read...
US-7,986,159 Method and apparatus for detecting a cable in a redriver
With conventional redrivers used for external Serial Advanced Technology Attachment (eSATA), there is no ability to indicated to a host that an external device...
US-7,986,010 High-voltage variable breakdown voltage (BV) diode for electrostatic discharge (ESD) applications
Formation of an electrostatic discharge (ESD) protection device having a desired breakdown voltage (BV) is disclosed. The breakdown voltage (BV) of the device...
US-7,985,990 Transistor layout for manufacturing process control
A symmetrical circuit is disclosed (FIG. 4). The circuit includes a first transistor (220) having a first channel in a substantial shape of a parallelogram...
US-7,985,603 Ferroelectric capacitor manufacturing process
A method of manufacturing a semiconductor device. The method comprises forming conductive and ferroelectric material layers on a semiconductor substrate. The...
US-7,984,393 System and method for making photomasks
The present disclosure is directed a method for preparing photomask patterns. The method comprises receiving drawn pattern data for a design database, the drawn...
US-7,984,352 Saving debugging contexts with periodic built-in self-test execution
A system comprises built-in self-test (BIST) logic configured to perform a BIST, processing logic coupled to the BIST logic and storage logic coupled to the...
US-7,984,349 IC multiplexer control circuitry for tap selection circuitry
Today many instances of IEEE 1149.1 Tap domains are included in integrated circuits (ICs). While all TAP domains may be serially connected on a scan path that...
US-7,984,348 Series equivalent scans across multiple scan topologies
Performing series equivalent scans spanning a plurality of scan technologies in a complex scan topology may be performed by performing shift operations in the...
US-7,984,347 System and method for sharing a communications link between multiple communications protocols
A system and method for sharing a communications link between multiple protocols is described that comprises a system comprising a communications interface...
US-7,984,331 TAM with scan frame copy register coupled with serial output
Testing of an electrical device is achieved by providing a test access mechanism within the device that can receive scan frames from an external tester. The...
US-7,984,319 Memory bus shared system
The invention reduces the pin terminal number of a controller that in parallel or simultaneously accesses a synchronous memory and an asynchronous memory. When...
US-7,984,206 System for debugging throughput deficiency in an architecture using on-chip throughput computations
A method, system, and apparatus for debugging throughput deficiency in an architecture using on-chip throughput computations are disclosed. In one embodiment, a...
US-7,983,375 Variable delay oscillator buffer
A novel and useful variable delay digitally controlled crystal oscillator (DCXO) buffer (i.e. slicer). A conventional slicer following the DCXO is modified to...
US-7,983,071 Dual node access storage cell having buffer circuits
An integrated circuit includes an array of memory cells, each including a core storage element with first and second complementary storage nodes and first and...
US-7,982,827 System and method for dynamically altering a color gamut
System and method for dynamically altering a color gamut used in projection display systems. An embodiment comprises determining a dim color from colors used in...
US-7,982,775 Method and apparatus for motion stabilization
A method and apparatus for digital image stabilization. The method comprises segmenting an exposure time to have multiple partial-exposure images of a scene and...
US-7,982,471 Capacitance measurement system and method
A capacitance measurement system precharges first terminals (21-0 . . . 21-k . . . 21-n) of a plurality of capacitors (25-0 . . . 25-k . . . 25), respectively,...
US-7,982,447 Switched mode power supply having improved transient response
A switched mode power supply has a high side switching transistor coupled between a voltage source and a load for generating the output voltage at the load. A...
US-7,982,438 Method and circuit for controlling the refresh rate of sampled reference voltages
The present invention relates to controlling the refresh rate of the reference voltage on a sampling capacitor (C.sub.samp). A comparator (COMP) compares the...
US-7,978,015 Oscillator with reduced phase noise characteristics
One well known problem associated with voltage controlled oscillators or VCOs is phase noise, and it is desirable to reduce phase noise in order to improve VCO...
US-7,978,004 Body bias coordinator, method of coordinating a body bias and sub-circuit power supply employing the same
The present invention provides a body bias coordinator for use with a transistor employing a body region. In one embodiment, the body bias coordinator includes...
US-7,977,230 Rectangular contact used as a low voltage fuse element
A repair fuse element and method of construction are disclosed that eliminate or substantially reduce the disadvantages and problems associated with prior fuse...
US-7,975,196 Resynchronization memory in series/parallel with control/data scan cells
An integrated circuit or circuit board includes functional circuitry and a scan path. The scan path includes a test data input lead, a test data output lead, a...
US-7,974,595 Methodology for assessing degradation due to radio frequency excitation of transistors
One embodiment relates to an on-chip power amplifier (PA) test circuit. In one embodiment, a PA test circuit comprises a controllable oscillator (CO) configured...
US-7,974,418 Virtualizer with cross-talk cancellation and reverb
Audio loudspeaker and headphone virtualizers and cross-talk cancellers and methods use separate virtual speaker locations for different Bark frequency bands and...
US-7,974,334 Systems and methods for hybrid-MIMO equalization
Embodiments provide systems and methods for a novel multiple-input multiple-output (MIMO) equalization technique that produces a channel matrix that contains...
US-7,974,144 Memory with tunable sleep diodes
A system and are described as to adjusting voltages in a memory device, while the device is in sleep mode, to prevent or minimize voltage or current leakage of...
US-7,974,005 Display screen for use in front projectors
A screen for use in image presentations comprises an array of transmissive elongated prisms. The screen is capable of delivering incident light, having an...
US-7,973,999 System for on-chip actuation
In accordance with particular embodiments, a system for displaying modulated light includes a spatial light modulator comprising a plurality of micromirrors...
US-7,973,557 IC having programmable digital logic cells
An integrated circuit (IC) includes at least one programmable digital logic cell that includes first dedicated digital logic cell having a plurality of...
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