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Patent # Description
US-8,049,214 Degradation correction for finFET circuits
A pair of split-gate fin field effect transistors (finFETs) in an IC, each containing a signal gate and a control gate, in which an adjustable voltage source,...
US-8,049,119 Integrated circuit package having integrated faraday shield
A packaged integrated circuit (IC) (100) includes a first substrate (110) comprising a first plurality of layers and a first circuit coupling features (112) at...
US-8,048,750 Method to enhance channel stress in CMOS processes
The invention provides a method of fabricating a semiconductor device that enhances the amount of stress that is transmitted to the channel region for carrier...
US-8,048,358 Pop semiconductor device manufacturing method
The objective of the invention is to prevent electrostatic destruction of semiconductor chips during resin molding. With the semiconductor device manufacturing...
US-8,047,660 Projection system and method including spatial light modulator and compact diffractive optics
A method and apparatus for a projection display system includes a spatial light modulator and a volume illumination hologram. The spatial light modulator...
US-8,046,748 Method and system to emulate an M-bit instruction set
A method and system to emulate an M-bit instruction set. At least some of the illustrative embodiments are a method comprising fetching at least a portion of an...
US-8,046,651 Compare circuit receiving scan register and inverted clock flip-flop data
The disclosure describes a novel method and apparatus for providing expected data, mask data, and control signals to scan test architectures within a device...
US-8,046,650 TAP with control circuitry connected to device address port
The disclosure describes a novel method and apparatus for making device TAPs addressable to allow device TAPs to be accessed in a parallel arrangement without...
US-8,046,649 Scan circuits formed peripheral of core circuits with control leads
An integrated circuit carries an intellectual property core. The intellectual property core includes a test access port 39 with test data input leads 15, test...
US-8,046,228 Voice activated hypermedia systems using grammatical metadata
This is a voice activated Hypermedia system using grammatical metadata, the system comprising: a speech user agent; a browsing module; and an information...
US-8,046,199 System and method for computing parameters for a digital predistorter
Digital predistortion system, methods and circuitry for adapting a predistortion system linearizing a non-linear element. The system is a multiply partitioned...
US-8,045,941 Methods and apparatus to implement receiver linearity enhancement
Methods and apparatus to implement receiver linearity enhancement are described. One example method includes controlling receiver gain by determining a level of...
US-8,045,922 Apparatus for and method of bluetooth and wireless local area network coexistence using a single antenna in a...
A novel and useful apparatus for and method of providing a mechanism for achieving coexistence between a Bluetooth system and WLAN system collocated in the same...
US-8,045,836 System and method for recording high frame rate video, replaying slow-motion and replaying normal speed with...
A method to record high frame rate video, compatible with existing industry standards, that permits selecting either slow-motion playback or true speed playback...
US-8,045,670 Interpolative all-digital phase locked loop
An embodiment of the present invention provides a phase locked loop that operates on clock signals derived from an RF clock signal generated by the phase locked...
US-8,045,662 Binary ripple counter sampling with adjustable delays
The output bits of a binary ripple counter are used to control the sampling of those output bits, thereby ensuring accurate sampling. A sampler is provided with...
US-8,045,661 System and method for blind identification of multichannel finite impulse response filters using an iterative...
A system for, and method of, blind identification of multichannel finite impulse response filters. In one embodiment, the system includes: (1) a decomposition...
US-8,045,632 Systems and methods for dual-carrier modulation encoding and decoding
Systems and methods for dual-carrier modulation (DCM) encoding and decoding for communication systems. Some embodiments comprise a DCM encoder for applying a...
US-8,045,576 Methods and apparatus to manage power consumption in wireless local area network devices
Methods and apparatus to manage power consumption in wireless devices are disclosed. A disclosed example apparatus comprises performing a first received signal...
US-8,045,317 Current limited voltage source with wide input current range
An integrated electronic device includes circuitry for providing a regulated output supply voltage level at an output node from an adjustable current. The...
US-8,044,741 Systems and methods for reducing flicker noise in an oscillator
Various systems and methods for implementing dynamic logic are disclosed herein. For example, some embodiments of the present invention provide LC tank circuits...
US-8,044,712 Circuit and method for improved frequency resolution of wide-bandwidth digitally programmable RC active filters
An active RC filter (20) includes a first resistive element (23) and a first capacitor array (10/50) which co-acts with the first resistive element (23) to...
US-8,044,649 Dual mode regulation loop for switch mode power converter
The invention relates to a DC-DC converter, which includes a power stage driven by a pulse width modulator, a first error amplifier with a first input coupled...
US-8,044,646 Voltage regulator with quasi floating gate pass element
Various apparatuses, methods and systems for a voltage regulator are disclosed herein. For example, some embodiments provide an apparatus for regulating a...
US-8,044,644 Symmetric sample and hold over-current sensing method and apparatus
An over-current condition is detected in a synchronous DC-DC converter by sampling and holding a measured load current value. The load current is sampled while...
US-8,044,611 LED control device
An LED controller is provided that can easily control light-on testing of LEDs. A super voltage can be added to a signal including a low voltage and a high...
US-8,044,610 LED driver with adaptive algorithm for storage capacitor pre-charge
A method is provided for driving a plurality of light emitters in a plurality of output paths with each output path including at least one light emitter. The...
US-8,044,495 Metallic leadframes having laser-treated surfaces for improved adhesion to polymeric compounds
A leadframe for the assembly of a semiconductor chip has regions (112) with an original smooth surface of glossy appearance and regions (113, 114, 210) of a...
US-8,043,973 Mask overhang reduction or elimination after substrate etch
A method of forming IC devices includes providing a substrate and forming a patterned masking layer including at least one masked region having at least one...
US-8,043,947 Method to eliminate re-crystallization border defects generated during solid phase epitaxy of a DSB substrate
A method for semiconductor processing provides a DSB semiconductor body having a first crystal orientation, a second crystal orientation, and a border region...
US-8,043,921 Nitride removal while protecting semiconductor surfaces for forming shallow junctions
A method of removing silicon nitride over a semiconductor surface for forming shallow junctions. Sidewall spacers are formed along sidewalls of a gate stack...
US-8,043,545 Methods and apparatus to evenly clamp semiconductor substrates
Methods and apparatus to evenly clamp semiconductor substrates in a transfer mold process are disclosed. A disclosed split mold base includes a first plate...
US-8,042,248 Low cost window production for hermetically sealed optical packages
Disclosed embodiments demonstrate batch processing methods for producing optical windows for micro-devices. The windows protect the active elements of the...
US-8,041,999 Effecting adapter commands upon sequential target system TAP states
A method comprises performing at least one zero-bit scan across an interface. The at least one zero-bit scan defines a command window. Further, the method...
US-8,041,998 Data processor decoding trace-worthy event collision matrix from pipelined processor
A method and/or a system of a processor-agnostic encoded debug architecture in a pipelined environment is disclosed. In one embodiment, a method of a processor...
US-8,041,982 Real time clock
Various apparatuses, methods and systems for a real time clock are disclosed herein. For example, some embodiments provide a real time clock including a clock...
US-8,040,986 Frequency-domain subchannel transmit antenna selection and power pouring for multi-antenna transmission
A system comprises a wireless device that communicates across a spectrum having a plurality of sub-channels. The wireless device comprises a plurality of...
US-8,040,973 Transmitter including pre-distortion
The present invention relates to pre-distortion in transmitter circuits and provides a circuit for introducing pre-distortion into the output of a transmitter,...
US-8,040,959 Dynamic resource allocation to improve MIMO detection performance
A method and apparatus for detecting symbols in a Multiple-Input Multiple-Output Orthogonal Frequency Division Multiplexing ("MIMO-OFDM") system. A MIMO-OFDM...
US-8,040,652 Programmable power distribution switches with two-level current sensing
Programmable power distribution switches with two-level current sensing are disclosed. In a particular example, a power distribution switch includes a...
US-8,040,627 Methods and apparatus for generating a hard drive write signal
Methods and apparatus for generating a hard drive write signal are here in disclosed. A disclosed method comprises generating a hard drive write signal on an...
US-8,040,305 Constant-weight bit-slice PWM method and system for scrolling color display systems
A display system 100 includes a light source 110 and a color wheel 114. An optical section 112 is arranged to receive light from the light source 110 and to...
US-8,040,171 Accelerator output stage that adjusts drive duration to loading
The accelerator output stage circuit includes: a high side output device coupled to an output node; a low side output device coupled to the output node; a first...
US-8,040,116 Automatically configurable dual regulator type circuits and methods
Automatically configurable dual regulator type circuits and methods are provided. On embodiment of the invention includes an automatically configurable dual...
US-8,040,019 Driver and driving method
Conventional drivers for transducers oftentimes did not provide an efficient driving mechanism because the driving signal was not "close enough" to the natural...
US-8,039,956 High current semiconductor device system having low resistance and inductance
A high current semiconductor device (for example QFN for 30 to 70 A) with low resistance and low inductance is encapsulated by molding compound (401, height 402...
US-8,039,955 Mold lock on heat spreader
A mold lock and a method of forming the mold lock are provided. The mold lock is used in an encapsulated semiconductor device and includes a neck and a shaped...
US-8,039,385 IC devices having TSVS including protruding tips having IMC blocking tip ends
A through substrate via (TSV) die includes a plurality of TSVs including an outer dielectric sleeve and an inner metal core and protruding TSV tips including...
US-8,039,320 Optimized circuit design layout for high performance ball grid array packages
A method of laying out traces for connection of bond pads of a semiconductor chip to a printed wiring board or the like and the layout. There is provided a...
US-8,039,317 Aluminum leadframes for semiconductor QFN/SON devices
A post-mold plated semiconductor device has an aluminum leadframe (105) with a structure including a chip mount pad and a plurality of lead segments without...
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