Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: texas instruments





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-8,019,280 System and method for avoiding interference in a dual-signal device
A dual-signal wireless transceiver is provided, comprising: a first wireless transceiver circuit configured to transmit and receive first signals using a first...
US-8,019,086 Stereo synthesizer using comb filters and intra-aural differences
A method for creating a stereophonic sound image out of a monaural signal combines two sub-methods. Comb filters decorrelate the left and right channel signals....
US-8,018,903 Closed-loop transmit diversity scheme in frequency selective multipath channels
Closed loop multiple-antenna wireless communications system with antenna weights determined by maximizing a composite channel signal-to-interference-plus-noise...
US-8,018,780 Temperature dependent back-bias for a memory array
The present invention provides a thermostatic bias controller for use with a memory array. The thermostatic bias controller includes a temperature sensing...
US-8,018,740 LLC soft start by operation mode switching
An embodiment of the invention provides a method of reducing surge current in an LLC converter. The LLC converter comprises a switching circuit having a first...
US-8,018,369 Error correction method and apparatus
A switched current source is provided. The switched current source is generally comprised of transistors and resistors, and the source has a high output...
US-8,018,241 Logic applying different bit positions to respective scan paths
An integrated circuit (70) having parallel scan paths (824-842, 924-942) includes a pair or pairs of scan distributor (800,900) and scan collector (844,944)...
US-8,018,238 Embedded sar based active gain capacitance measurement system and method
A system for measuring a capacitor (C.sub.SENj) precharges a CDAC (23) in a SAR converter (17) to a reference voltage (V.sub.AZ) and also precharges a first...
US-8,018,235 Methods and apparatus to facilitate ground fault detection with a single coil and an oscillator
Methods and apparatus to facilitate ground fault detection with a single coil and an oscillator are disclosed. An example ground fault detection device includes...
US-8,017,935 Parallel redundant single-electron device and method of manufacture
A method of manufacturing a parallel redundant array of single-electron devices. The method includes (a) providing a mask for diffusing a plurality of n-doped...
US-8,017,493 Method of planarizing a semiconductor device
A process of forming a semiconductor process fabricated device which contains a trench, hole or gap filled with a conformally deposited material is disclosed. A...
US-8,017,439 Dual carrier for joining IC die or wafers to TSV wafers
A method of forming stacked electronic articles using a through substrate via (TSV) wafer includes mounting a first carrier wafer to a top side of the TSV wafer...
US-8,017,410 Power semiconductor devices having integrated inductor
An electronic device (100) with one or more semiconductor chips (102) has an inductor (101) assembled on or under the chips. The inductor includes a...
US-8,015,513 OPC models generated from 2D high frequency test patterns
A method of generating a scalable OPC model for composing reticle pattern files from IC layouts using 2D test patterns is disclosed. The 2D test patterns...
US-8,015,476 CRC syndrome generation for multiple data input widths
A sequence of cyclic redundancy check syndromes can be produced based on a received sequence of sets of parallel data wherein different ones of the sets can...
US-8,015,475 Erasure decoding for receivers
A system comprising communication logic capable of receiving data signals from a network. The signals comprise both erasure error and random error. The system...
US-8,015,466 Adapting scan-BIST architectures for low power operation
A Scan-BIST architecture is adapted into a low power Scan-BIST architecture. A generator 102, compactor 106, and controller 110 remain the same as in the known...
US-8,015,464 Segmented scan paths with cache bit memory inputs
Scan and Scan-BIST architectures are commonly used to test digital circuitry in integrated circuits. The present disclosure improves upon low power Scan and...
US-8,015,463 IC with TAP, DIO interface, SIPE, and PISO circuits
Testing of die on wafer is achieved by; (1) providing a tester with the capability of externally communicating JTAG test signals using simultaneously...
US-8,014,098 Technique for duty cycle shift in hard disk drive write system
A circuit for providing a write current having a programmably adjustable duty cycle in a hard disk drive write channel has a differential pair gain circuit for...
US-8,013,911 Method for mixing high-gain and low-gain signal for wide dynamic range image sensor
A wide dynamic range image sensor method combines the response of high-gain sensing cells and low-gain sensing cells with better linearity than the prior art. A...
US-8,013,772 Reduced area digital-to-analog converter
One embodiment of the invention includes a digital-to-analog converter (DAC) system. A resistive ladder comprises a plurality of resistors having an...
US-8,013,763 Method and apparatus for unit interval calculation
A method is provided. In this method, a clock signal and an input signal are received, where the input signal is a Manchester encoded signal. A unit interval...
US-8,013,677 One-sided switching pulse width modulation amplifiers
One-sided pulse width modulated (PWM) amplifiers are disclosed. An example amplifier includes an integrator to receive first and second analog signals, and to...
US-8,013,655 Apparatus and method for efficient level shift
An apparatus is provided that uses a first level shifter for performing a voltage shift of a low level input signal of a first voltage domain to a high level...
US-8,013,635 Multi-mode circuit and a method for preventing degradation in the multi-mode circuit
Multi-mode circuit (the circuit) and a method for preventing degradation in the circuit. The circuit includes a first transistor that enables functioning of the...
US-8,013,634 LVDS data input circuit with multiplexer selecting data out input
First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an...
US-8,012,879 Etching method using an at least semi-solid media
An etching method that uses an etch reactant retained within at least a semi-solid media (120, 220, 224, 230). The etch reactant media is applied to selectively...
US-8,012,877 Backside nitride removal to reduce streak defects
Exemplary embodiments provide a method for fabricating an integrated circuit (IC) device with reduced streak defects. In one embodiment, the IC device structure...
US-8,012,844 Method of manufacturing an integrated circuit
A method of manufacturing an integrated circuit comprises depositing a electrically resistive layer of a material for serving as a thin film resistor (TFR),...
US-8,012,842 Method for fabricating isolated integrated semiconductor structures
An integrated semiconductor structure that has first and second bipolar transistor structures. The first bipolar transistor structure has a doped tank region in...
US-8,012,319 Multi-chambered metal electrodeposition system for semiconductor substrates
A multi-chambered system for electroplating metal layers on a semiconductor substrate. The system comprises a fluid reservoir having at least a first chamber...
US-RE42,681 Wireless system with transmitter having multiple transmit antennas and combining open loop and closed loop...
A wireless communication system (40). The system comprises transmitter circuitry (42) comprising encoder circuitry (44) for receiving a plurality of symbols...
US-8,010,857 Input/output boundary cells and output data summing scan cell
Scan testing of plural target electrical circuits, such as circuits 1 through N, becomes accelerated by using the scan test response data output from one...
US-8,010,818 Power efficient method for controlling an oscillator in a low power synchronous system with an asynchronous I2C bus
In a method and apparatus for saving power in a device coupled to a bus, the device is placed to operate in a power saving mode by powering off a selective...
US-8,009,688 Decoding packets with deadlines in communications channels processing unit
A method of processing first and second record packets of real-time information includes computing for each packet a deadline interval and ordering processing...
US-8,009,546 Over current protection device
An over current protection device is described. It includes a plurality of input channels for receiving an input signal; a plurality of low pass filters coupled...
US-8,009,395 Methods and apparatus for over-voltage protection of device inputs
Methods and apparatus for over-voltage protection of device inputs are disclosed. An example apparatus to protect a device from an over-voltage condition...
US-8,008,969 Single supply class-D amplifier
Traditionally, switching amplifiers (i.e., class-D and class-G) with negative supply rails had issues with direct current (DC) power loss, included large...
US-8,008,968 Multipath amplifier
Because of variations in open loop gain and bandwidth in successive approximate register (SAR) analog-to-digital converters (ADCs), designing amplifiers with...
US-8,008,216 Nitrogen profile in high-K dielectrics using ultrathin disposable capping layers
Metal Oxide Semiconductor (MOS) transistors fabricated using current art may utilize a nitridation process on the gate dielectric to improve transistor...
US-8,008,200 Poison-free and low ULK damage integration scheme for damascene interconnects
A method of forming a dual damascene structure is disclosed. A lower dielectric hardmask layer and an upper dielectric hardmask layer are deposited on an ultra...
US-8,008,183 Dual capillary IC wirebonding
The invention discloses apparatus and methods for the formation of bond wires in integrated circuit assemblies by attaching two separate wires using a dual...
US-8,008,131 Semiconductor chip package assembly method and apparatus for countering leadfinger deformation
The invention provides semiconductor chip packages, tools, and methods for preventing and for correcting leadfinger deformation caused during wirebonding in...
US-8,006,151 TAP and shadow port operating on rising and falling TCK
The disclosure describes a novel method and apparatus for providing a shadow access port within a device. The shadow access port is accessed to perform...
US-8,005,153 Method and apparatus for increasing the number of orthogonal signals using block spreading
Embodiments of the invention apply block spreading to transmitted signals to increase the number orthogonally multiplexed signals. The principle of the...
US-8,004,860 Radiofrequency and electromagnetic interference shielding
An electrical device comprising an electronic component mounted to a surface of a printed circuit board, a ground connection on said surface, and...
US-8,004,444 ADC chopping transconductor having two pairs of cascode transistors
A chopping transconductor includes an transconductor input stage coupled with input signals of the chopping transconductor; a chopping switch coupled with an...
US-8,004,366 Area and power efficient, high swing and monolitihic ground centered headphone amplifier circuit operable on a...
A minimal area, power efficient, high swing and monolithic ground centered headphone amplifier circuit operable on a low voltage. An input amplifier stage...
US-8,004,298 IC with first and second distributors collectors and scan paths
An integrated circuit (70) having parallel scan paths (824-842, 924-942) includes a pair or pairs of scan distributor (800,900) and scan collector (844,944)...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.