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Patent # Description
US-7,939,393 Method of adjusting FDSOI threshold voltage through oxide charges generation in the buried oxide
Different performance MOSFET Fully Depleted devices can be achieved on a single chip by varying the Vt through ion implantation. The integration of multiple Vt...
US-7,939,378 Palladium-spot leadframes for high adhesion semiconductor devices and method of fabrication
A leadframe for use in the assembly of integrated circuit chips comprising a base metal structure having an adherent layer of nickel covering said base metal;...
US-7,937,637 TAP with enable input gated and multiplexed mode select
A TAP Linking Module (TLM) couples plural TAPs, via select and enable signals, to an externally accessible IEEE 1149.1 interface. The select signals are outputs...
US-7,937,635 Selectively accessing test access ports in a multiple test access port environment
A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).
US-7,936,876 System and method for transporting video data through a dual-link HD-SDI connection
In accordance with the teachings the present invention, a system and method for transporting video data through a dual-link HD-SDI connection is provided. In a...
US-7,936,810 Delayed combining of frequency-domain equalized wireless channels with large delay-spreads
Methods and apparatus to perform frequency-domain equalization in high-speed downlink packet access (HSDPA) receivers for wireless channels with large...
US-7,936,624 Reduced power bitline precharge scheme for low power applications in memory devices
A method and system are described for a two step precharging of bitlines in a memory array. In the first step a partial precharge of the bitline is accomplished...
US-7,936,623 Universal structure for memory cell characterization
An integrated circuit includes a structure, where the structure includes a memory base cell, a first port set, a second port set, and a set of other ports,...
US-7,936,589 Adaptive voltage control for SRAM
The present invention pertains to semiconductor memory devices, and particularly to a system and method for adaptively setting the operating voltages for SRAM...
US-7,936,506 System and method for displaying images
System and method for projection display with slim cabinet depth. An embodiment comprises a collimating layer positioned in a light path of a display plane, and...
US-7,936,229 Local oscillator incorporating phase command exception handling utilizing a quadrature switch
A novel and useful apparatus for and method of local oscillator generation employing an exception handling mechanism that permits an oscillator having a limited...
US-7,936,221 Computation spreading for spur reduction in a digital phase lock loop
A novel and useful apparatus for and method of spur reduction using computation spreading in a digital phase locked loop (DPLL) architecture. A software based...
US-7,936,183 IC output signal path with switch, bus holder, and buffer
An electronic integrated circuit includes a signal path connected between the functional logic (15) thereof and an external output terminal. The signal path...
US-7,936,033 Micro-optical device packaging system
According to one embodiment, a micro-optical device includes an electro-optical circuit and an annular frame disposed on a surface of a substrate. The...
US-7,935,543 Method of forming PZT ferroelectric capacitors for integrated circuits
One aspect of the invention relates to a method of manufacturing an integrated circuit comprising forming an array of ferroelectric memory cells on a...
US-7,934,113 Self-clearing asynchronous interrupt edge detect latching register
A digital circuit may have at least two asynchronous clock domains with a controller responsive to a first domain clock signal and a target responsive to a...
US-7,934,036 Interrupt-related circuits, systems, and processes
An electronic interrupt circuit includes an interrupt-related input line, a security-related status input line, a context-related status input line, and a...
US-7,933,469 Video processing
Digital video contrast enhancement and skin tone correction by conversion to CIECAM02 color space with lightness transformation and a skin tone probability...
US-7,933,342 Multipath equalization for MIMO multiuser systems
Interference rejection (85) can be applied to a wireless communication signal with reduced computational complexity by producing from a sample vector (y) a...
US-7,933,138 F-RAM device with current mirror sense amp
A F-RAM memory device containing a current mirror sense amp. A F-RAM memory device containing a current mirror sense amp coupled to a negative voltage...
US-7,932,843 Parallel CABAC decoding for video decompression
A method of video decoding is provided that includes receiving a data stream comprising a sequence of syntax elements that were compressed using...
US-7,932,779 D-class amplifier
A D-class amplifier that can suppress noise generated when a D-class amplification operation is started/stopped. When a D-class amplification operation is...
US-7,932,756 Master slave delay locked loops and uses thereof
Various systems and methods for delaying a signal relative to another signal are disclosed. As one example, a delay lock loop circuit is disclosed that includes...
US-7,932,711 Pop noise suppression technique
A voltage supply circuit and a circuit device can reduce the noise in the output of the circuit when the power to the circuit is turned on and off and can...
US-7,932,703 System and method for switch mode power supply delay compensation
A delay applied to a turn-on time for a high side switch in a switch mode power converter prevents oscillation between continuous and discontinuous conduction...
US-7,932,139 Methodology of improving the manufacturability of laser anneal
A method of laser annealing a workpiece for reduction of warpage, slip defects and breakage, the method comprising (a) moving a workpiece through a laser beam...
US-7,930,689 Method and system for accessing indirect memories
Systems, methods, and storage media for accessing indirect memory in Java applications are provided. In some embodiments, a storage medium is provided that...
US-7,930,656 System and method for making photomasks
The present disclosure is directed a method for preparing photomask patterns. The method comprises receiving drawn pattern data for a design database. The drawn...
US-7,930,572 Method and apparatus for reducing memory current leakage a mobile device
A processing system includes a processor (20) having an idle mode node for generating an idle mode signal indicating whether the processor is in an idle mode...
US-7,930,565 Power-optimizing memory analyzer, method of operating the analyzer and system employing the same
Embodiments of the present disclosure provide a power-optimizing memory analyzer, a method of operating a power-optimizing memory analyzer and a memory system...
US-7,930,132 Tire rotation detection system and method
A method for determining whether a tire is in rotation is provided. A measured acceleration is compared to a first threshold after a first timer indicates that...
US-7,930,130 Method and system for reducing device test time
A system and method for reducing device test time are disclosed herein. A method for reducing device test time includes applying a linear program solver to...
US-7,930,121 Method and apparatus for synchronizing time stamps
Traditionally, time stamp circuits have been used for precise digital time measurements. The resolution of these types of circuits, though, was generally...
US-7,929,912 Apparatus for and method of Bluetooth and WiMAX coexistence in a mobile handset
A novel and useful apparatus for and method of Bluetooth and WiMAX coexistence. The invention provides a system approach to achieving coexistence between...
US-7,929,637 Method and apparatus for digital amplitude and phase modulation
A transmitter using quadrature modulation includes a rectangular to polar converter for converting data symbols into a polar form, where each polar symbol has a...
US-7,929,631 Multiple space time transmit diversity communication system with selected complex conjugate inputs
A transmitter comprising circuitry (14) for converting input bits to a plurality of symbols; and circuitry (24.sub.x) for forming a complex conjugate of signals...
US-7,929,626 Variable power communications including rapid switching between coding constellations of various sizes
A method of varying the power output of a transmitter. The method includes providing bit-loading information associated with each tone of multiple tones, where...
US-7,929,583 System and method for optical frequency conversion
A system and method for optical frequency conversion having asymmetric output include a coherent light apparatus. The coherent light apparatus includes a...
US-7,929,520 Method, system and apparatus for providing signal based packet loss concealment for memoryless codecs
In a method, apparatus and system for transmitting packet loss concealment (PLC) information, a subscriber device divides a voice sample into a plurality of...
US-7,929,416 Receiving a pilot design and channel estimation
A receiver in an OFDM based communication system is adapted to perform channel estimation using a received reference signal transmitted from at least one...
US-7,928,999 Pulse width modulation algorithm
In display systems employing spatial light modulators, the OFF-state light from OFF-state pixels of the spatial light modulator can be captured and directed...
US-7,928,784 Method and apparatus to improve and control the propagation delay in a current slewing circuit
A circuit for independently controlling slew and propagation delay of a current DAC is provided. The circuit applies dual slope technique with feed-back control...
US-7,928,766 Semi-buffered auto-direction-sensing voltage translator
In a method and system for translating voltage levels to interface electronic devices, a voltage translator is operable to perform the translation of voltage...
US-7,928,714 Load-induced voltage overshoot detection and correction in switching power supplies
One embodiment of the invention includes a switching power supply system. The system includes a switch network comprising at least one switch configured to...
US-7,928,711 Linear voltage regulator with accurate open load detection
A linear voltage regulator is provided which has a pair of complementary power transistors connected "back to back" in series between a voltage input and a...
US-7,928,707 Method and apparatus for power management of a low dropout regulator
A method of switching a low dropout regulator includes determining an actual active time of a power request from an electronic device; enabling the low dropout...
US-7,928,703 On-chip current sensing
One embodiment of the invention includes an on-chip current-sense system for measuring a magnitude of an output current through a power transistor. The system...
US-7,928,574 Semiconductor package having buss-less substrate
A ball grid array device with an insulating substrate (110) having metal traces (106, for example copper, about 18 .mu.m thick) with sidewalls (108) at right...
US-7,928,550 Flexible interposer for stacking semiconductor chips and connecting same to substrate
A semiconductor device with a first (101) and a second (111) semiconductor chip assembled on an insulating flexible interposer (120). The interposer, preferably...
US-7,928,544 Semiconductor chip package assembly with deflection- resistant leadfingers
The invention relates to leadframes and semiconductor chip package assemblies using leadframes, and to methods for their assembly. A disclosed embodiment of the...
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