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Patent # Description
US-7,839,560 Packaged spatial light modulator and a display system using the same
A spatial light modulator comprises an array of individually addressable pixels enclosed within a space formed by a package lid and a package substrate. An...
US-7,839,316 Chopping technique for continuous time sigma-delta ADCs without Q-noise folding
A chopping transconductor includes an transconductor input stage coupled with input signals of the chopping transconductor; a chopping switch coupled with an...
US-7,839,155 Methods and apparatus to analyze on-chip controlled integrated circuits
Methods and apparatus for analyzing an integrated circuit are disclosed. An example method includes supplying power to an on-chip supply power regulator of...
US-7,838,988 Stud bumps as local heat sinks during transient power operations
A thermal management configuration for a flip chip semiconductor device is disclosed. The device includes a high power silicon based die having a metal bonding...
US-7,838,924 MOS device with substrate potential elevation
An integrated circuit (25) formed at a semiconducting surface of a substrate including a common p-layer (38) includes functional circuitry (24) formed on the...
US-7,838,429 Method to manufacture a thin film resistor
A method for manufacturing a semiconductor device that method comprises forming a thin film resistor by a process that includes depositing a resistive material...
US-7,838,376 Non-destructive inline epi pattern shift monitor using selective epi
Integrated circuits using buried layers under epitaxial layers present a challenge in aligning patterns for surface components to the buried layers, because the...
US-7,838,370 Highly selective liners for semiconductor fabrication
A method for manufacturing an isolation structure is disclosed that protects the isolation structure during etching of a dichlorosilane (DCS) nitride layer. The...
US-7,838,356 Gate dielectric first replacement gate processes and integrated circuits therefrom
A method for fabricating a CMOS integrated circuit (IC) and ICs therefrom includes the steps of providing a substrate having a semiconductor surface, wherein the...
US-7,835,574 System and method to generate multiprimary signals
System and method for generating multiprimary signals for use in display devices. A preferred embodiment comprises converting a color signal into an intermediate...
US-7,835,535 Virtualizer with cross-talk cancellation and reverb
Audio loudspeaker and headphone virtualizers and cross-talk cancellers and methods use separate virtual speaker locations for different Bark frequency bands and...
US-7,835,391 Protocol DMA engine
Apparatus and method for accelerating data handling in the protocol stack of a networked device. Embodiments of the disclosed invention may be used to increase...
US-7,835,262 Multi-band OFDM communications system
System and method for providing multiple access in a multi-band, orthogonal frequency division multiplexed (multi-band-OFDM) communications system. A preferred...
US-7,835,098 Automatic gain control for magnetic disk-drive preamplifier
One embodiment of the invention includes a preamplifier system for a magnetic disk-drive. The system comprises a read amplifier configured to generate a read...
US-7,835,054 Optical architecture having a rotating polygon for use in imaging systems
An optical architecture comprises a refractive cylinder that is movable relative to the incident light. By moving the refractive cylinder, the output light from...
US-7,834,703 Amplifier with single-ended input and differential output
An amplifier provided according to an aspect of the present invention includes a set of passive impedances forming a tuned load to a gain stage and also to...
US-7,834,686 Power amplifier
Methods to implement power control in a digital power amplifier are described.
US-7,834,636 Methods and apparatus to facilitate ground fault detection with a single coil
A ground fault detection device includes a sense coil including a primary winding and a secondary winding to detect current in a line conductor and a neutral...
US-7,834,615 Bist DDR memory interface circuit and method for self-testing the same using phase relationship between a data...
An apparatus and method for self-testing a DDR memory interface are disclosed. In one aspect, a built-in-self-test (BIST) memory interface circuit includes a...
US-7,834,608 Feed-forward compensation for a hysteretic switching regulator
One embodiment of the invention includes a hysteretic power regulator system. The system includes a switching stage configured to periodically couple an input...
US-7,833,895 TSVS having chemically exposed TSV tips for integrated circuit devices
A method for fabricating ICs including via-first through substrate vias (TSVs) and ICs and electronic assemblies therefrom. A substrate having a substrate...
US-7,832,870 Projection system using reflected light from a color wheel
According to one embodiment, a projection system includes a color wheel operable to filter light into a passed component and a reflected component. The...
US-7,831,878 Integrated circuit with JTAG port, tap linking module, and off-chip tap interface port
An IC includes an IEEE 1149.1 standard test access port (TAP) interface and an additional Off-Chip TAP interface. The Off-Chip TAP interface connects to the TAP...
US-7,831,875 Interconnections for plural and hierarchical P1500 test wrappers
A test architecture accesses IP core test wrappers within an IC using a Link Instruction Register (LIR). An IEEE P1500 standard is in development for providing...
US-7,830,906 Variable time division multiplex transmission system
A time division multiplex transmission system transmits information on multiple channels by using a transmission path with variable time division multiplexing....
US-7,830,765 Methods and apparatus to monitor and control hard-disk head position
Methods and apparatus to monitor and control hard-disk drive head position are described. In one example, a hard-disk drive system includes a hard-disk drive...
US-7,830,183 Comparator with reduced power consumption
A comparator component having a comparison circuit and bias generator circuit, with the bias generator circuit also having a same number of transistors connected...
US-7,829,430 Methods for preparing and devices with treated dummy moats
Devices and methods are presented to fabricate dummy moats in an isolation region on a substrate. Presently, dummy moats are prone to losing impedance after the...
US-7,829,405 Lateral bipolar transistor with compensated well regions
Conduction between source and drain or emitter and collector regions is an important characteristic in transistor operation, particularly for lateral bipolar...
US-7,829,389 Roll-on encapsulation method for semiconductor packages
A low-viscosity resin is deposited using an apparatus with a movable and heatable wheel and a heater stage. A tape is provided, which includes a layer (140) of...
US-7,827,453 Core test circuits controlling boundary and general external scan circuits
An integrated circuit carries an intellectual property core. The intellectual property core includes a test access port 39 with test data input leads 15, test...
US-7,827,342 Readback registers
A method reading bank register values is provided. Register values are stored in a readback bank. The register values are output sequentially from the serial...
US-7,827,225 Methods and systems for a multi-channel Fast Fourier Transform (FFT)
In at least some embodiments, a method is provided. The method includes receiving samples from a first input channel and a second input channel. The method...
US-7,826,572 Dynamic optimization of overlap-and-add length
A method of adjusting overlap-and-add length for zero-padded suffixes. The method includes, based on a channel impulse response, estimating an effective channel...
US-7,826,568 Far-end crosstalk (FEXT) canceller
A novel and useful mechanism for the detection, estimation and correction of far-end cross talk (FEXT) caused by transmissions over adjacent wire pairs or...
US-7,826,485 MAC extensions for smart antenna support
Apparatus and methods implement aggregation frames and allocation frames. The aggregation frames include a plurality of MSDUs or fragments thereof aggregated or...
US-7,826,459 Coexistence of different network technologies
In at least some embodiments, a communication device includes a plurality of network technology subsystems, each subsystem associated with a different network...
US-7,826,341 Methods and systems for implementing a pseudo-noise signaling mechanism in wireless communication
In at least some embodiments, a system may comprise one or more devices configurable to communicate according to a first protocol that implements a first data...
US-7,826,135 Screen film for light projection brightness enhancement
A front-projection screen that includes a prismatic film that comprises an outside surface of the screen. The film includes parallel prismatic grooved lines....
US-7,826,121 Use of an angle-selective retro-reflector to recapture off-state energy
Provided is a method for using a display system. The method, in one embodiment, includes directing a light beam from a light source to an array of individually...
US-7,825,990 Method and apparatus for analog graphics sample clock frequency offset detection and verification
A method and apparatus for an analog-to-digital video signal converter. The converter is controlled by a clock with controllable frequency and phase for sampling...
US-7,825,971 Low noise image sensing system and method for use with sensors with very small pixel size
The image sensing system includes integrating charge in an image sensor array; transferring the charge out of the image sensor array; converting the charge to a...
US-7,825,846 Error correction method and apparatus
A switched current source is provided. The switched current source is generally comprised of transistors and resistors, and the source has a high output...
US-7,825,740 Systems and methods for tracking communication parameters over a plurality of frequency bands
In at least some embodiments, a communication system includes a receiver having a local oscillator (LO) for each of a plurality of frequency bands. Each LO is...
US-7,825,695 OR gate connecting LVDS comparators to multiplexer
First and second devices may simultaneously communicate bidirectionally with each other using only a single pair of LVDS signal paths. Each device includes an...
US-7,825,689 Functional-input sequential circuit
An exemplary functional input sequential circuit for reducing the setup time of input signals. The functional sequential circuit includes a tri-state inverter...
US-7,825,025 Method and system for improved nickel silicide
According to one embodiment of the invention, a method for nickel silicidation includes providing a substrate having a source region, a gate region, and a drain...
US-7,824,829 Method of monitoring focus in lithographic processes
The present disclosure is directed to a method for monitoring focus of a photolithography system. The method comprises providing a substrate and depositing a...
US-7,824,824 Composite phase shifting lithography mask including etch stop layer
The formation of a lithographic mask (100) is disclosed, where the mask (100) can be used in forming integrated circuits onto a semiconductor substrate. A layer...
US-7,823,044 Method for streamlining error connection code computation while reading or programming a NAND flash memory
A method for streamlining error correction code computation while reading or programming a NAND flash memory. At least some of the illustrative embodiments are...
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