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Patent # Description
US-7,876,856 Quadrature receiver with correction engine, coefficient controller and adaptation engine
Methods and apparatus to compensate for I/Q mismatch in quadrature receivers are disclosed. An example apparatus disclosed herein comprises a correction engine...
US-7,876,854 High data rate closed loop MIMO scheme combining transmit diversity and data multiplexing
Closed loop multiple-antenna wireless communications system with antenna weights determined by maximizing a composite channel signal-to-interference-plus-noise...
US-7,876,726 Adaptive allocation of communications link channels to I- or Q-subchannel
System and method for adaptively allocating channels to subchannels and maintain balance on the subchannels. A preferred embodiment comprises an assignment unit...
US-7,876,696 Adaptive upstream bandwidth estimation and shaping
One embodiment of the present invention includes a method for adaptively estimating available upstream bandwidth in a network. The method comprises monitoring...
US-7,876,340 Pulse width modulation algorithm
In display systems employing spatial light modulators, the OFF-state light from OFF-state pixels of the spatial light modulator can be captured and directed back...
US-7,876,298 Control timing for spatial light modulator
A spatial light modulator clocking method, called fast-clear, which employs embedded clear hardware in the SLM to enable the fast-clear bit to generate...
US-7,876,242 Method and apparatus for unit interval calculation of displayport auxilliary channel without CDR
A method for decoding a Manchester-II encoded DISPLAYPORT compatible signal is provided. In this method, several counters are reset. A unit interval (UI) counter...
US-7,876,112 Parallel scan distributors and collectors and process of testing integrated circuits
An integrated circuit (70) having parallel scan paths (824-842, 924-942) includes a pair or pairs of scan distributor (800,900) and scan collector (844,944)...
US-7,873,889 JTAG bus communication method and apparatus
The present disclosure describes using the JTAG Tap's TMS and/or TCK terminals as general purpose serial Input/Output (I/O) Manchester coded communication...
US-7,873,886 PC-connectivity for on-chip memory
An interface for converting a traditional scan-chain interface into one where locations in the scan-chain can be read or written to from an addressed interface...
US-7,872,841 In package ESD protections of IC using a thin film polymer
A packaged semiconductor device (200) with a substrate (220) having, sandwiched in an insulator (221), a flat sheet-like sieve member (240) made of a non-linear...
US-7,872,486 Wing-shaped support members for enhancing semiconductor probes and methods to form the same
Example wing-shaped support members for enhancing semiconductor device probes and methods to form the same are disclosed. A disclosed example semiconductor...
US-7,872,456 Discontinuous conduction mode pulse-width modulation
One embodiment of the invention includes a power regulator system. The system includes a switching system configured to generate an output voltage across a load...
US-7,872,338 Microelectromechanical device packages with integral heaters
A microelectromechanical device package with integral a heater and a method for packaging the microelectromechanical device are disclosed in this invention. The...
US-7,872,336 Low cost lead-free preplated leadframe having improved adhesion and solderability
A leadframe with a structure made of a base metal (105), wherein the structure has a plurality of surfaces. On each of these surfaces are metal layers in a stack...
US-7,871,931 Method for chemical mechanical planarization of a metal layer located over a photoresist layer and a method for...
The present invention provides a method for planarizing a metal layer, and a method for manufacturing a micro pixel array. The method for planarizing the metal...
US-7,871,864 Locking feature and method for manufacturing transfer molded IC packages
The invention discloses integrated circuits (ICs), molded IC packages, and to leadframe arrays, package arrays and methods for their manufacture. Leadframe...
US-7,870,451 Automatable scan partitioning for low power using external control
Scan architectures are commonly used to test digital circuitry in integrated circuits. The present invention describes a method of adapting conventional scan...
US-7,870,450 High speed double data rate JTAG interface
A process and apparatus provide a JTAG TAP controller (302) to access a JTAG TAP domain (106) of a device using a reduced pin count, high speed DDR interface...
US-7,869,231 System and method for synchronous rectifier drive that enables converters to operate in transition and...
A synchronous rectifier is switched in accordance with a primary switch transition and a reference signal representing current in a current storage device to...
US-7,869,145 System and method for illuminating a target
According to one embodiment of the present invention, a system for illuminating a target includes a light source configured to emit one or more light beams with...
US-7,868,794 Methods and apparatus to test and compensate multi-channel digital-to-analog converters
Methods and apparatus to test and compensate multi-channel digital-to-analog converters (DACs) are described. In some examples, a multi-channel digital-to-analog...
US-7,868,690 Comparator with sensitivity control
A comparator has a differential input stage, a current source coupled to the differential input stage for providing a tail current to one side of the...
US-7,868,670 Phase-locked loop (PLL) circuit and method
A phase-locked loop (PLL) circuit includes a reference clock divider with a reference clock input, a phase-frequency detector, a charge pump, a loop filter, a...
US-7,868,599 Method of optimum current blanking time implementation in current sense circuit
In a method and system for sensing current in a switching regulator (SWR) operating in a current mode, a power switch is coupled to receive the current from a...
US-7,866,852 Heat sinks for cooling LEDs in projectors
According to certain embodiments, an apparatus for cooling light emitting diodes (LEDs) in projectors includes one or more first LEDs, one or more first heat...
US-7,866,036 Method of fabricating micromirror device
A micromirror device and a method of making the same are disclosed herein. The micromirror device comprises a mirror plate, hinge, and post each having an...
US-7,865,849 System and method for estimating test escapes in integrated circuits
A method for designing an integrated circuit including estimating a test escape rate for tests of interest, a test coverage calculator and a system for...
US-7,865,791 Reduced signaling interface method and apparatus
This disclosure describes a reduced pin bus that can be used on integrated circuits or embedded cores within integrated circuits. The bus may be used for serial...
US-7,864,661 Time-switched preamble generator, method of generating and multiple-input, multiple-output communication system...
The present invention is directed to a time-switched preamble generator and method of generating a time-switched preamble for use with a multiple-input,...
US-7,864,600 Memory cell employing reduced voltage
A memory array is provided having a memory cell coupled to a read word line and a write word line of the memory array and peripheral circuits for reading and...
US-7,864,494 Methodology to guard ESD protection circuits against precharge effects
An ESD protection circuit (710) is guarded by a parallel first precharge elimination circuit (720) relative to an I/O pad (721) and a parallel second precharge...
US-7,864,191 Techniques for efficient dithering
A system comprising a storage including an image file associated with a plurality of pixels and processing logic coupled to the storage. The processing logic is...
US-7,863,994 System and method for increasing radio frequency (RF) microwave inductor-capacitor (LC) oscillator frequency...
System and method for increasing the frequency tuning range of a RF/microwave LC oscillator. A preferred embodiment comprises a voltage controlled oscillator...
US-7,863,985 High frequency amplifier linearization technique
An output stage for an amplifier is provided. The amplifier generally provides for compensation of an error current generated by the base-collector (or...
US-7,863,944 Passive clock detector
A clock detector is provided. The clock detector generally comprises a filter, a first branch, a second branch, a latch, and logic. The filter is adapted to...
US-7,863,921 Circuit board and method for automatic testing
A circuit board (CB) and method for automatic testing of an electronic device under test (DUT). The circuit board (CB) has a first terminal (T1) for coupling to...
US-7,863,919 Applying test response start and command signals to power lead
The present disclosure describes a novel method and apparatus for using a device's power and ground terminals as a test and/or debug interface for the device....
US-7,863,913 Parallel scan distributors and collectors and process of testing integrated circuits
An integrated circuit (70) having parallel scan paths (824-842, 924-942) includes a pair or pairs of scan distributor (800,900) and scan collector (844,944)...
US-7,863,738 Apparatus for connecting integrated circuit chip to power and ground circuits
In a method and system for transferring at least one of power and ground signal between a die and a package base of a semiconductor device, a connector is formed...
US-7,863,192 Methods for full gate silicidation of metal gate structures
One embodiment relates to a method of fabricating an integrated circuit. In the method, p-type polysilicon is provided over a semiconductor body, where the...
US-7,863,103 Thermally improved semiconductor QFN/SON package
A semiconductor device without cantilevered leads uses conductive wires (120) to connect the chip terminals to the leads (110), and a package compound (140) to...
US-7,863,098 Flip chip package with advanced electrical and thermal properties for high current designs
A QFN package and method of making same is provided comprising a substrate having a metal line extending from a connection element on a perimeter region of the...
US-7,860,710 Methods, devices and systems for improved codebook search for voice codecs
An electronic circuit (1100) including a processor circuit (1110) and a storage circuit establishing a speech coder (1170) for execution by said processor...
US-7,860,152 Wireless communications system with secondary synchronization code based on values in primary synchronization code
A wireless communication system. The system comprises transmitter circuitry (BST1), the transmitter circuitry comprising encoder circuitry (50) for transmitting...
US-7,860,132 Comma free codes for fast cell search using tertiary synchronization channel
A method of processing data comprises the receiving a frame of data having a predetermined number of time slots (502,504,506). Each time slot comprises a...
US-7,860,028 Flexible ethernet bridge
Flooding in an Ethernet bridge can be minimized by employing various techniques. In one embodiment using an address table containing a plurality of entries, each...
US-7,859,985 Control on at least one frequency selecting data carrier frequencies
System and method for signaling control information in a multi-carrier communications system to transmit data. A preferred embodiment comprises demodulating a...
US-7,859,289 Method for measuring interface traps in thin gate oxide MOSFETS
A method for measuring interface traps in a MOSFET, includes measuring charge pumping current of a pulse wave form for various frequencies over a predetermined...
US-7,859,275 Parallel scan distributors and collectors and process of testing integrated circuits
An integrated circuit (70) having parallel scan paths (824-842, 924-942) includes a pair or pairs of scan distributor (800,900) and scan collector (844,944)...
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