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Patent # Description
US-7,777,572 Integrated power amplifier
Methods to implement low cost, high efficiency, low loss power combiner with novel matching circuits are disclosed. A narrow band power combiner enables a high...
US-7,777,569 Anti-pop method and apparatus for class AB amplifiers
A method for actuating an amplifier to generally eliminate a pop is provided. Accordingly, a plurality of current sources is actuated in an input stage, and a...
US-7,777,531 Low power low voltage differential signaling (LVDS) output drivers
A method and apparatus for providing a low power low voltage differential signaling driver are disclosed. In an example, a low voltage differential signaling...
US-7,777,525 Input buffer in ultradeep submicron process
An input buffer for an Ultradeep Sub Micron (UDSM) process which allows the UDSM process to interface with a 3V input. The input voltage is applied to a...
US-7,777,514 Methods for transferring integrated circuits to a printed circuit board
The present invention implements a mechanism using an inter-connection layer to couple a plurality of integrated circuit devices to a printed circuit board,...
US-7,777,470 System and method for controlling a hysteretic mode converter
A system and method for controlling a conversion frequency of a hysteretic mode voltage converter. A digital control loop comprises a timing measure unit having...
US-7,776,653 Controlling flip-chip techniques for concurrent ball bonds in semiconductor devices
A device has a first semiconductor chip (101) with contact pads in an interior first set (102) and a peripheral second set (103). A deformed sphere (104) of...
US-7,776,625 Method for locating a sub-surface feature using a scatterometer
The present invention provides a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device, without limitation, may...
US-7,774,758 Systems and methods for secure debugging and profiling of a computer system
The present disclosure describes methods and systems for secure debugging and profiling of a computer system. Some illustrative embodiments may include a system...
US-7,774,739 Methods for adjusting shifter width of an alternating phase shifter having variable width
In accordance with an embodiment of the invention, there is a method of designing a lithography mask. The method can comprise determining a maximum width of a...
US-7,774,664 Separate scan cell in series with TAP instruction register
An integrated circuit can have plural core circuits, each having a test access port that is defined in IEEE standard 1149.1. Access to and control of these ports...
US-7,773,692 System and methods for digitally correcting a non-linear element using a digital filter for predistortion
System and methods for a digital linearization of a non linear element. Digital predistortion methods and circuitry for linearizing a non-linear element that...
US-7,773,639 Synchronization of voice packet generation with transmission opportunities in a wireless network
One embodiment of the present invention includes a method for synchronizing packet production and receipt from a digital signal processor (DSP) with polled...
US-7,773,560 Repeated channel adaptive frequency hopping
The invention provides systems, devices, and methods for frequency hopping. In one method embodiment, the invention hops between frequencies by using the same...
US-7,773,431 Systems and methods for reading data from a memory array
One embodiment of the present invention includes a column multiplexer for accessing data from a memory array comprising an output node having a logic state that...
US-7,773,359 Overcurrent protection system and method
An overcurrent protection system and method are disclosed. In one embodiment the overcurrent protection system includes a first switch connected between a supply...
US-7,773,358 Output current control and overload protection in digital audio amplifiers
Overcurrent and overload protection for the power output of a pulse-width-modulated digital audio system is disclosed. The overcurrent protection circuitry...
US-7,773,115 Method and system for deblurring digital camera images using reference image and motion estimation
Deblur digital camera image captured in low-light, long-integration-time conditions by deconvolution based on motion estimation from preceding and following...
US-7,773,024 SAR analog-to-digital converter with large input range
A method for analog-to-digital conversion is provided using successive approximation and a plurality of capacitors including a first set of capacitors and a...
US-7,773,011 Self-testing digital-to-analog converter
One embodiment of the invention includes a digital-to-analog converter (DAC) circuit. The DAC circuit includes a DAC portion configured to generate an output...
US-7,772,890 Systems and methods for dynamic logic keeper optimization
Various systems and methods for implementing dynamic logic are disclosed herein. For example, some embodiments of the present invention provide dynamic logic...
US-7,772,867 Structures for testing and locating defects in integrated circuits
A method for detecting defects during semiconductor device processing can include providing a substrate having a semiconductor comprising layer with electrically...
US-7,772,830 Test handler automatic contactor cleaner methods and surrogate cleaning device
Methods and devices are disclosed for cleaning contactors equipped with contact pins such as pogo pins include steps which may be performed in concert with...
US-7,772,644 Vertical diffused MOSFET
A LDMOS transistor having a channel region located between an outer boundary of an n-type region and an inner boundary of a p-body region. A width of the LDMOS...
US-7,772,075 Formation of a MOSFET using an angled implant
A LDMOS transistor having a channel region located between an outer boundary of an n-type region and an inner boundary of a p-body region. A width of the LDMOS...
US-7,772,060 Integrated SiGe NMOS and PMOS transistors
A method of fabricating an integrated BiCMOS circuit is provided, the circuit including bipolar transistors 10 and CMOS transistors 12 on a substrate. The method...
US-7,772,059 Method for fabricating graphene transistors on a silicon or SOI substrate
A method of fabricating graphene transistors, comprising providing an SOI substrate, performing an optional threshold implant on the SOI substrate, forming an...
US-7,772,057 Method of fabricating an integrated circuit with gate self-protection, and an integrated circuit with gate...
An integrated circuit with gate self-protection comprises a MOS device and a bipolar device, wherein the integrated circuit further comprises a semiconductor...
US-7,772,014 Semiconductor device having reduced single bit fails and a method of manufacture thereof
One aspect of the invention provides a method of manufacturing a FeRAM semiconductor device having reduce single bit fails. This aspect includes forming an...
US-7,771,157 Bi-directional wafer transfer mechanism and method
A wafer transfer machine transfers wafers from either of a first wafer cassette (55) and a second wafer cassette (56) having incompatible registration features...
US-7,770,084 Selectable JTAG or trace access with data store and output
An addressable interface selectively enables JTAG TAP domain operations or Trace domain operations within an IC. After being enabled, the TAP receives TMS and...
US-7,770,083 DDR register circuitry input to IC test controller circuitry
A device test architecture and a reduced device test interface are provided to enable efficient testing of embedded cores and other circuits within devices. The...
US-7,770,081 Interface circuit for a single logic input pin of an electronic system
An interface circuit for a single logic input pin of an electronic system, comprising a decoder for converting a pulse coded signal applied to said pin to a...
US-7,769,098 Low complexity precoding matrix selection
A method of determining indices for matrix codewords in a matrix codeword codebook. The matrix codewords are adapted for communicating information between a...
US-7,769,090 Active link cable diagnostics
A novel apparatus for and method of estimating the cable length of an active network link. The cable diagnostics mechanism of the invention is particularly...
US-7,768,850 System for bitcell and column testing in SRAM
A system comprises a storage cell coupled to multiple bitlines and a transistor that couples to the multiple bitlines in parallel with the storage cell. The...
US-7,768,820 Feedback structure for an SRAM cell
Embodiments of the present disclosure provide a feedback structure, a method of constructing a feedback structure and an integrated circuit employing the...
US-7,768,351 Variable gain current input amplifier and method
Variable gain circuitry includes a first input transistor (M1) having a source coupled to a first conductor (32), a gate coupled to a first input voltage (Vin+),...
US-7,768,305 Quad state to two state interface circuitry with clock input
Quad-state logic elements and quad-state memory elements are used to reduce the wiring density of integrated circuits. The resulting reduction in wiring...
US-7,767,995 Single-electron tunnel junction for complementary metal-oxide device and method of manufacturing the same
A method of providing a p-type substrate, disposing a pad oxide layer on the p-type substrate, disposing a nitride layer on the pad oxide layer, forming a...
US-7,767,897 Beat matching for portable audio
Beat matching for two audio streams extracts beats from each, computes a conversion ratio from one stream to the other stream by an initial beat alignment plus a...
US-7,767,511 Semiconductor device manufactured using a method to improve gate doping while maintaining good gate profile
In one aspect, there is provided a method of manufacturing a semiconductor device. This method includes forming gate structures over a substrate, wherein the...
US-7,767,510 Semiconductor device made by the method of producing hybrid orientnation (100) strained silicon with (110) silicon
There is provided a method of manufacturing a semiconductor device. In one aspect, the method includes providing a strained silicon layer having a crystal...
US-7,765,516 System and method for making photomasks
The present application is directed a method for preparing a mask pattern database for proximity correction. The method comprises receiving data from a design...
US-7,765,447 Selectively accessing test access ports in a multiple test access port environment
A TAP linking module (21, 51) permits plural TAPs (TAPs 1-4) to be controlled and accessed from a test bus (13) via a single TAP interface (20).
US-7,764,451 System and method for use in displaying modulated light
A system for use in displaying modulated light includes a light source operable to generate a light beam. The system also includes a color wheel for receiving...
US-7,764,418 Sloped cantilever beam electrode for a MEMS device
A method of tilting a micromirror includes providing a substrate, a sloped electrode outwardly from the substrate, and a sloped electrode positioning system...
US-7,764,210 System and method for converting an input signal
A video driver includes a current-to-voltage converter circuit that converts an analog input current to a corresponding analog voltage. Active termination...
US-7,763,975 Flip-chip assembly of protected micromechanical devices
A low-cost ceramic package, in land-grid array or ball-grid array configuration, for micromechanical components is fabricated by coating the whole integrated...
US-7,763,949 MEMS device with controlled gas space chemistry
A process for protecting a MEMS device used in a UV illuminated application from damage due to a photochemical activation between the UV flux and package gas...
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