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| Patent # | Description |
|---|---|
| US-7,710,856 |
Methods and systems for implementing a pseudo-noise signaling mechanism in
wireless communication In at least some embodiments, a system may comprise one or more devices configurable to communicate according to a first protocol that implements a first data... |
| US-7,710,763 |
SRAM cell using separate read and write circuitry An SRAM device that includes an array of SRAM cells arranged in rows and columns. The SRAM device also includes a word line associated with at least one row, the... |
| US-7,710,748 |
AC/DC converter comprising plural converters in cascade The present invention relates to an AC/DC converter (1) of the type having an AC/DC conversion stage (2) and a DC/DC conversion stage (3), the AC/DC conversion... |
| US-7,710,635 |
System and method for hinge memory mitigation System and method for reducing failures due to hinge memory in a microdisplay display system. A preferred embodiment includes setting the state of each... |
| US-7,710,350 |
Method and apparatus for display According to one embodiment, a method for providing position feedback for a device includes providing a photointerrupter having a light-emitting diode, a... |
| US-7,710,296 |
N-bin arithmetic coding for context adaptive binary arithmetic coding A method of context adaptive binary arithmetic coding and decoding groups a plurality N binary symbols in corresponding syntax elements and divides a range into... |
| US-7,710,190 |
Apparatus and method for compensating change in a temperature associated
with a host device An apparatus for compensating temperature changes in a temperature associated with a compensated device includes: (a) An input circuit having a first input locus... |
| US-7,710,089 |
Automatic configuration for linear mode of switching power supply A method and apparatus for a Regulator that automatically configures to work in either SMPS mode or linear mode are disclosed. In one embodiment, the method... |
| US-7,709,349 |
Semiconductor device manufactured using a gate silicidation involving a
disposable chemical/mechanical... In one aspect, there is provided a method of manufacturing a semiconductor device that comprises placing a blocking layer, a CMP stop layer and a bulk oxide... |
| US-7,709,329 |
High-voltage variable breakdown voltage (BV) diode for electrostatic
discharge (ESD) applications Formation of an electrostatic discharge (ESD) protection device having a desired breakdown voltage (BV) is disclosed. The breakdown voltage (BV) of the device... |
| US-7,709,301 |
Integrated circuit having efficiently packed decoupling capacitors An integrated circuit includes a substrate having a semiconducting surface (605) and a plurality of standard cells arranged in a plurality of rows including at... |
| US-7,707,069 |
Supply of digital audio and video products A server for a merchant computer system, the server comprising: a file store for storing a range of audio/video products in respective product files; a dialogue... |
| US-7,706,755 |
Digital, down-converted RF residual leakage signal mitigating RF residual
leakage The present invention provides an RF transmission leakage mitigator for use with a full-duplex, wireless transceiver. In one embodiment, the RF transmission... |
| US-7,706,151 |
Method and apparatus for multi-phase power conversion A system and method for power conversion synchronizes multiple phases at a desired phase angle difference. The power conversion involves variable frequency... |
| US-7,705,741 |
Detection of a broken wire between power sourcing equipment and a powered
device A system and method for detecting a broken wire in a communication cable coupling a powered device to power sourcing equipment. Powered Devices (PDs) may be... |
| US-7,705,689 |
Synchronously stackable double-edge modulated pulse width modulation
generators Synchronously stackable double-edge modulated pulse width modulation generators are disclosed. An example pulse width modulation generator includes a ramp... |
| US-7,705,673 |
Over-current sensing during narrow gate drive operation of class D output
stages Two transistors of a class D output stage are driven by complementary, variable duty cycle signals PWM+ and PWM-. When the pulse width of the PWM+ signal becomes... |
| US-7,705,581 |
Electronic device and method for on chip jitter measurement The present invention relates to an integrated electronic device for digital signal processing, which includes a reference clock input for receiving a reference... |
| US-7,705,517 |
Ultrasound transmitter A system and method for providing a high voltage ultrasonic drive signal from an ultrasound transmitter are disclosed herein. An ultrasound transmitter includes... |
| US-7,705,379 |
Field effect transistor and solid state image pickup device A solid-state image pickup device improves the linearity of signal S.sub.1 and increases the saturation level in a solid-state image pickup device with an... |
| US-7,704,883 |
Annealing to improve edge roughness in semiconductor technology A method for manufacturing a semiconductor device. The method comprises depositing a material layer on a semiconductor substrate and patterning the material... |
| US-7,704,871 |
Integration of thin film resistors having different TCRs into single die An integrated circuit structure including multiple thin film resistors having different sheet resistances and TCRs includes a first oxide layer (2) formed on a... |
| US-7,704,813 |
Reliable high-voltage junction field effect transistor and method of
manufacturing therefor The present invention provides a high-voltage junction field effect transistor (JFET), a method of manufacture and an integrated circuit including the same. One... |
| US-7,704,811 |
Sub-lithographics opening for back contact or back gate A low resistance buried back contact for SOI devices. A trench is etched in an insulating layer at minimum lithographic dimension, and sidewalls are deposited in... |
| US-7,702,721 |
Method and apparatus for providing music information for a wireless audio
player A method and apparatus for providing music information for a wireless CD player is disclosed. The CD player may transmit a substantially unique CD tag to a music... |
| US-7,702,708 |
Frequency/delay synthesizer architecture An apparatus employing control words to present a synthesized output signal having an output frequency and a delay with respect to an input signal includes: (a)... |
| US-7,702,498 |
Emulation pause and reset tracing of multiple sync points pointing to
different addresses A method of tracing data processor activity includes trace data markers indicating initiation and termination of at least one trace function at a specified... |
| US-7,701,997 |
Fast hopping frequency synthesizer using an all digital phased locked loop
(ADPLL) A novel and useful fast hopping frequency synthesizer and transmitter associated therewith. The frequency synthesizer and transmitter incorporates a digitally... |
| US-7,701,964 |
Distributed device identifier numbering and total device counting
algorithm with smart time division... A distributed method and apparatus for assigning a unique identifier number to devices connected in a sequential fashion and determining a total device count is... |
| US-7,701,916 |
Space time transmit diversity for TDD with cyclic prefix midamble A circuit is designed with a matched filter circuit including a plurality of fingers (700, 702, 704) coupled to receive a data symbol. Each finger corresponds to... |
| US-7,701,730 |
Method and apparatus for power converters having phases spaced at desired
phase angles A system and method for power conversion synchronizes multiple phases at a desired phase angle difference. The power conversion involves variable frequency... |
| US-7,701,519 |
Display system and signal processing using diamond-shaped DMDs An imaging system 10 includes an image source providing an image having a resolution of X by Y pixels. The system also includes a digital mirror device 16 that... |
| US-7,701,293 |
Amplifier symmetric supply regulation A power converter receiving a single-sided supply which is ground-terminated and providing a regulated positive supply and a regulated negative supply that is... |
| US-7,701,249 |
IC output signal path with switch, bus holder, and buffer An electronic integrated circuit includes a signal path connected between the functional logic (15) thereof and an external output terminal. The signal path... |
| US-7,701,194 |
Methods and system for detecting DC output levels in an audio system A system for detecting a direct current (DC) component of a pulse-width modulated (PWM) signal includes a modulator configured to provide at least one PWM signal... |
| US-7,701,152 |
Method and circuit for controlling operation of a light-emitting diode A light-emitting diode control circuit is provided, that includes: a duration selection circuit for selecting one of a first duration value, a second duration... |
| US-7,701,073 |
Locking feature and method for manufacturing transfer molded IC packages The invention discloses integrated circuits (ICs), molded IC packages, and to leadframe arrays, package arrays and methods for their manufacture. Leadframe... |
| US-7,701,071 |
Method for fabricating flip-attached and underfilled semiconductor devices A semiconductor device (1700), which comprises a workpiece (1201) with an outline (1711) and a plurality of contact pads (1205) and further an external part... |
| US-7,700,481 |
Method for reliably removing excess metal during metal silicide formation A method for manufacturing a semiconductor device. The method comprises forming a metal layer on a silicon-containing layer located on a semiconductor substrate.... |
| US-7,700,467 |
Methodology of implementing ultra high temperature (UHT) anneal in
fabricating devices that contain sige Exemplary embodiments provide methods for implementing an ultra-high temperature (UHT) anneal on silicon germanium (SiGe) semiconductor materials by... |
| US-7,698,616 |
MIMO Hybrid-ARQ using basis hopping A Hybrid Automatic Retransmission Request (H-ARQ) technique is provided for Multi-Input Multi-Output (MIMO) systems. The technique changes the basis (V) upon... |
| US-7,698,614 |
Serial I/O using JTAG TCK and TMS signals The present disclosure describes a novel method and apparatus of using the JTAG TAP's TMS and TCK terminals as a general purpose serial Input/Output (I/O) bus.... |
| US-7,698,612 |
Direct scan access JTAG The present disclosure describes novel methods and apparatuses for directly accessing JTAG Tap domains that exist in a scan path of many serially connected JTAG... |
| US-7,698,544 |
Automatic halting of a processor in debug mode due to reset Disclosed herein is a system and method of operating a processor before and after a reset has been asserted. Prior to a reset being asserted the processor... |
| US-7,697,612 |
Image preprocessing with selective lowpass filtering from motion
compensation Preprocessing for motion-compensated video encoding such as MPEG includes lowpass filtering, temporal (310) and/or spatial (312), locally per pixel in response... |
| US-7,697,594 |
Method and apparatus for regenerative based interference cancellation
within a communication system Interference cancellation is performed in a communication system. A signal associated with the users is received to produce a received signal. A set of... |
| US-7,697,591 |
Crest factor reduction processor for wireless communications A wireless base station (15) for transmitting spread spectrum signals is disclosed. The base station (15) includes a peak compression unit (16), which is... |
| US-7,697,193 |
Micromirror and post arrangements on substrates A micromirror of a micromirror array of a spatial light modulator used in display systems comprises a mirror plate attached to a hinge that is supported by two... |
| US-7,696,909 |
Circuit for generating a temperature dependent current with high accuracy An apparatus for adjusting a first signal with respect to a second signal includes: (a) A first converter receiving the first signal and employing n first... |
| US-7,696,603 |
Back end thin film capacitor having both plates of thin film resistor
material at single metallization layer An integrated circuit back end capacitor structure includes a first dielectric layer on a substrate, a thin film bottom plate on the first dielectric layer, and... |
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