Easy To Use Patents Search & Patent Lawyer Directory
At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.
Searching: texas instruments
Search by keyword, patent number, inventor, assignee, city or state:
| Patent # | Description |
|---|---|
| US-7,855,907 |
Mitigation of charge sharing in memory devices One embodiment relates to a memory element disposed on a substrate. The memory element includes first and second interlocked data storage elements adapted to... |
| US-7,855,903 |
System and method for programming an internal parameter or feature in a
power converter with a multi-function... A programmable parameter or feature is provided for a power converter through a multi-function connection on the converter controller. The parameter or feature... |
| US-7,855,863 |
Driver with electrostatic discharge protection Various apparatuses, methods and systems for protecting a driver from electrostatic discharge are disclosed herein. For example, some exemplary embodiments... |
| US-7,855,849 |
Methods and apparatus for temperature compensation for hard disk drive
write overshoot current Methods and apparatus for temperature compensation for hard disk drive writer overshoot current are disclosed. A disclosed system comprises creating a first... |
| US-7,855,812 |
Cellular phone with scanning capability A cellular phone is provided with a media scanning capability. Scanner optics, an optional light source and related scanning circuitry is integrated within a... |
| US-7,855,595 |
High dynamic range ASK demodulator for use in an RFID transponder An ASK demodulator for use in an RFID transponder having a limiter circuit associated with the antenna circuit and converting the ASK antenna field strength... |
| US-7,855,535 |
Inrush current control One embodiment of the present invention includes a power supply system. The power supply system comprises a variable voltage source configured to provide and... |
| US-7,855,432 |
Integrated thermal characterization and trim of polysilicon resistive
elements Devices, systems, and methods for providing an on-chip, temperature-stable resistance network for generating a precision current or precision resistance are... |
| US-7,855,111 |
Border region defect reduction in hybrid orientation technology (HOT)
direct silicon bonded (DSB) substrates Hybrid orientation technology (HOT) substrates for CMOS ICs include (100)-oriented silicon regions for NMOS and (110) regions for PMOS for optimizing carrier... |
| US-7,855,090 |
In line test circuit and method for determining interconnect electrical
properties and integrated circuit... A test circuit for, and method of, determining electrical properties of an underlying interconnect layer and an overlying interconnect layer of an integrated... |
| US-7,855,088 |
Method for manufacturing integrated circuits by guardbanding die regions The invention provides a method for manufacturing an integrated circuit. The method, in one embodiment, includes inspecting a semiconductor wafer including a... |
| US-7,853,997 |
Method and system for a multi-sharing security firewall Systems and methods for a multi-sharing security firewall are provided. Embodiments of a memory security firewall apparatus are provided that include region... |
| US-7,853,913 |
Minimizing number of masks to be changed when changing existing
connectivity in an integrated circuit A method and apparatus for fabricating integrated circuits providing a desired operation using a plurality of masks, wherein each of said plurality of masks is... |
| US-7,853,640 |
Key distribution The distribution of Bluetooth IDs among multiple integrated circuit testers at multiple sites for programming with a master database containing large size ID... |
| US-7,853,205 |
Methods for improving transmission efficiency of control channels in
communication systems Embodiments of the invention provide methods for optimizing the spectral efficiency of control channel transmissions carrying scheduling assignments from a... |
| US-7,852,974 |
Plural circuit selection using role reversing control inputs Data is communicated through two separate circuits or circuit groups, each having clock and mode inputs, by sequentially reversing the role of the clock and mode... |
| US-7,852,941 |
Transcoders and methods Transcoding as from MPEG-2 SDTV to MPEG-4 CIF reuses motion vectors and downsamples in the frequency (DCT) domain with differing treatments of frame-DCT and... |
| US-7,852,247 |
Mixed-signal filter One embodiment of the invention includes a mixed-signal filter. The mixed-signal filter comprises an analog signal path configured to process a first analog... |
| US-7,852,116 |
IC output signal path with switch, bus holder, and buffer An electronic integrated circuit includes a signal path connected between the functional logic (15) thereof and an external output terminal. The signal path... |
| US-7,852,110 |
Controlling the slew-rate of an output buffer An output buffer provided according to an aspect of the present invention is designed to generate an output signal with a slew rate that is substantially... |
| US-7,852,100 |
Parallel scan distributors and collectors and process of testing
integrated circuits An integrated circuit (70) having parallel scan paths (824-842, 924-942) includes a pair or pairs of scan distributor (800,900) and scan collector (844,944)... |
| US-7,851,928 |
Semiconductor device having substrate with differentially plated copper
and selective solder A semiconductor device having an insulating substrate with differentially plated metal and selective solder. Chip 221 with contact studs 223 is attached onto the... |
| US-7,851,264 |
Semiconductor device singulation method The objective of the invention is to provide a semiconductor device manufacturing method with which the generation of burrs can be suppressed while increasing... |
| US-7,848,450 |
Methods and apparatus to pre-compensate for I/Q distortion in quadrature
transmitters Methods and apparatus to pre-compensate for in-phase/quadrature (I/Q) distortion in quadrature transmitters are disclosed. A disclosed example method comprises... |
| US-7,848,125 |
Keep-alive for power stage with multiple switch nodes A keep alive circuit for recharging bootstrap capacitors in multiple totem-pole switching power stages using N-channel field effect transistor or NPN bipolar... |
| US-7,847,795 |
Method and system for controlling spatial light modulator interface buses In accordance with the teachings of the present disclosure, a method and system for controlling spatial light modulator buses are provided. In accordance with... |
| US-7,847,785 |
Backlight device A circuit to appropriately adjust the emission intensity of LEDs of various colors. By means of a first optical sensor (11), the detection range of which... |
| US-7,847,717 |
Low noise current steering DAC A low noise current steering digital-to-analog converter (DAC). The DAC includes a current reference for generating a bias current that biases a set of current... |
| US-7,847,648 |
Oscillator with delay compensation In the many microelectronics applications, delays present in circuitry can affect both the design and the function of the circuitry. One example of delays... |
| US-7,847,600 |
Track and hold circuit Methods and apparatus are disclosed to track and hold a voltage. An example track and hold circuit comprises a first electronic switch, a second electronic... |
| US-7,847,538 |
Testing micromirror devices An array of individually addressable micromirrors is characterized by sending a driving signal to a pixel group having a fewer number of micromirrors. A response... |
| US-7,847,401 |
Methods, systems and structures for forming semiconductor structures
incorporating high-temperature processing... A method (100) of forming semiconductor structures (202) including high-temperature processing steps (step 118), incorporates the use of a high-temperature... |
| US-7,847,399 |
Semiconductor device having solder-free gold bump contacts for stability
in repeated temperature cycles A semiconductor device has a chip (101) with gold studs (212) assembled on a tape substrate (102), which has solder balls (103) for attachment to external parts.... |
| US-7,847,391 |
Manufacturing method for integrating a shunt resistor into a semiconductor
package An integrated circuit package that comprises a lead frame, an integrated circuit located on the lead frame and a shunt resistor coupled to the lead frame and to... |
| US-7,847,381 |
Package for an integrated circuit According to various illustrative embodiments of the present invention, a device for an integrated circuit includes a monolithic frame having a plurality of... |
| US-7,847,378 |
Compliant wirebond pedestal A wire bonder (900) with a rigid pedestal (902) having resilient inserts (920). A package (904) placed on the pedestal (902) contains an electrical device (906).... |
| US-7,847,351 |
Lateral metal oxide semiconductor drain extension design A semiconductor device comprising source and drain regions and insulating region and a plate structure. The source and drain regions are on or in a semiconductor... |
| US-7,846,789 |
Isolation trench with rounded corners for BiCMOS process A semiconductor device comprising a first transistor device on or in a semiconductor substrate and a second transistor device on or in the substrate. The device... |
| US-7,846,783 |
Use of poly resistor implant to dope poly gates A process of fabricating an IC is disclosed in which a polysilicon resistor and a gate region of an MOS transistor are implanted concurrently. The concurrent... |
| US-7,843,654 |
Collecting lens A system and method for collimating light emitted from a light source, such as a light-emitting diode (LED), is provided. The system and method includes two... |
| US-7,843,643 |
Laminated micromirror package A system and method of aligning a micromirror array to the micromirror package and the micromirror package to a display system. One embodiment provides a method... |
| US-7,843,345 |
Dual frequency RFID circuit A radio frequency identification (RFID) transponder (FIGS. 4 and 5A) is disclosed. The transponder includes first (RF) and second (GND) terminals. A first... |
| US-7,843,265 |
Methods and apparatus to reduce idle current in power amplifiers Power amplifiers with reduced idle currents are described. In some examples, a power amplifier includes a driver configured to generate a control signal based on... |
| US-7,843,254 |
Methods and apparatus to produce fully isolated NPN-based bandgap
reference Generating a bandgap reference by generating a first current in a first circuit and a second current in a second circuit, a control circuit forcing the first and... |
| US-7,843,246 |
Clamp control circuit having current feedback In accordance with an aspect of the present invention, an external FET driving circuit includes a driving portion, a drain-to-gate clamp portion and a current... |
| US-7,843,207 |
Methods and apparatus to test electronic devices Methods and apparatus to test electronic devices are disclosed. An example method includes setting a first controlled switch to prevent a current detect signal... |
| US-7,843,183 |
Real time clock (RTC) voltage regulator and method of regulating an RTC
voltage A real time clock (RTC) voltage regulator, a method of regulating an RTC voltage and a power management integrated circuit (PMIC). In one embodiment, an RTC... |
| US-7,843,150 |
Power regulation for LED strings One embodiment of the invention includes a power regulator system. The system comprises at least one current regulator configured to maintain a substantially... |
| US-7,842,955 |
Carbon nanotube transistors on a silicon or SOI substrate A method of forming a single wall thickness (SWT) carbon nanotube (CNT) transistor with a controlled diameter and chirality is disclosed. A photolithographically... |
| US-7,842,949 |
IC with comparator receiving expected and mask data from pads Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the... |
File A Patent Application
- Protect your idea -- Don't let someone else file first. Learn more.
- 3 Easy Steps -- Complete Form, application Review, and File. See our process.
- Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.