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Patent # Description
US-7,655,946 IC with comparator receiving expected and mask data from pads
Test circuits located on semiconductor die enable a tester to test a plurality of die/ICs in parallel by inputting both stimulus and response patterns to the...
US-7,655,555 In-situ co-deposition of Si in diffusion barrier material depositions with improved wettability, barrier...
A copper interconnect having a transition metal-silicon-nitride barrier (106). A transition metal-nitride is co-deposited with Si by reactive sputtering in a Si...
US-7,655,553 Microstructure sealing tool and methods of using the same
A method of packing electronic devices and an apparatus thereof are disclosed herein. The method allows for usage of solder materials with a melting temperature...
US-7,655,552 Double density method for wirebond interconnect
A method, comprising bonding a first wire to a single die bond pad to form a first bond, bonding the first wire to a bond post to form a second bond, bonding a...
US-7,655,523 Advanced CMOS using super steep retrograde wells
The present invention is a method for forming super steep doping profiles in MOS transistor structures. The method comprises forming a carbon containing layer...
US-7,655,492 Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates
A method for forming a MEMS device is disclosed, where a final release step is performed just prior to a wafer bonding step to protect the MEMS device from...
US-7,654,677 Yokeless hidden hinge digital micromirror device
A micromirror array 110 fabricated on a semiconductor substrate 11. The array 110 is comprised of three operating layers 12, 13, 14. An addressing layer 12 is...
US-7,653,758 Memory system with memory controller and board comprising a digital buffer wherein input/output data and clock...
A digital registered data buffer is disclosed that has data paths each with a data input for receiving a digital data input signal (Dn), a clock input for...
US-7,653,632 File system for storing multiple files as a single compressed file
A file archive system for storing multiple files and directories as a single file. The file archive system could be used on a hand-held computer or other...
US-7,653,240 Color filter array and method
Color filter array demosaicing as is useful in digital cameras, still and video, using a single sensor includes blending of directional and non-directional...
US-7,653,045 Reconstruction excitation with LPC parameters and long term prediction lags
A media over packet networking appliance provides a network interface, a voice transducer, and at least one integrated circuit assembly coupling the voice...
US-7,652,657 Method and system for determining characteristics of optical signals on spatial light modulator surfaces
The present application describes a system and method for determining characteristics (e.g., exact band location, orientation and height and the spot shape and...
US-7,652,537 Amplifier with programmable input impedance
One embodiment of the invention includes an amplifier system. The amplifier system comprises an amplifier stage configured to receive an input signal at an...
US-7,652,513 Slave latch controlled retention flop with lower leakage and higher performance
In a method and apparatus for data retention, a first latch latches a data input and a second latch that is coupled to the first latch retains the data input...
US-7,652,461 High efficiency power converter operating free of an audible frequency range
A DC-DC converter operates outside of an audible frequency range under light current load conditions with reduced switching frequency by reducing supply current...
US-7,652,445 On-chip compensation for a fully differential voice coil motor control
A disk drive controller including a differential voice coil motor control function is disclosed. The differential voice coil motor control function includes an...
US-7,651,734 Micromechanical device fabrication
A method of fabricating a micromechanical device. Several of the micromechanical devices are fabricated 20 on a common wafer. After the devices are fabricated,...
US-7,651,227 Projection system and method including spatial light modulator and compact diffractive optics
A method and apparatus for a projection display system includes a spatial light modulator and a volume illumination hologram. The spatial light modulator...
US-7,650,549 Digital design component with scan clock generation
A master and a slave stage of a flip-flop are each separately clocked with non-overlapping clock signals during scan mode to eliminate a data input scan mode...
US-7,650,528 Fuse farm redundancy method and system
A system and method for making efficient use of fuse ROM redundancy to increase yield and security. Some embodiments provide a memory repair system including a...
US-7,650,255 Automatic selective retest for multi-site testers
A method of multi-site testing a batch of semiconductor units using a multi-site automated tester (100). The tester (300) includes a handler (320) coupled to a...
US-7,649,960 Feedback and scheduling schemes for a communications system
The present invention provides a transmitter. In one embodiment, the transmitter includes a coefficient circuit configured to generate coefficients of a set of...
US-7,649,569 Time base correction in video systems
System and method for digitally correcting time base errors in video display systems. A preferred embodiment comprises 1) correcting time base errors in a first...
US-7,649,549 Motion stabilization in video frames using motion vectors and reliability blocks
Stabilization for devices such as hand-held camcorders segments a low-resolution frame into a region of reliable estimation, finds a global motion vector for the...
US-7,649,414 Methods and apparatus to reduce substrate voltage bounces and spike voltages in switching amplifiers
Methods and apparatus to reduce voltage bounces and spike voltages in switching amplifiers are disclosed. An example apparatus to reduce spike voltages in a...
US-7,649,400 Back gate biasing overshoot and undershoot protection circuitry
The signal switch has flat resistance across the input/output voltage range when in the ON state while still isolating input/output nodes from overshoots and...
US-7,649,379 Reducing mission signal output delay in IC having mission and test modes
An integrated circuit apparatus includes a switching circuit that provides respective signal paths to permit a mission signal, a test signal, and a boundary scan...
US-7,649,330 Low-power pulse-width-modulated retract of disk drive actuator
A disk drive system including retract logic for control of the voice coil motor in a retract operation, in which the voice coil motor positions the read/write...
US-7,649,326 Highly efficient series string LED driver with individual LED control
A current source generates, with high efficiency, a current that is substantially constant over a wide range of output voltages. This current is injected into...
US-7,649,280 Method and circuit for cross regulation in a power converter
A power equalization circuit in a transformer-based device having a plurality of isolated voltage outputs is provided. The circuit comprises: a threshold...
US-7,648,857 Process for precision placement of integrated circuit overcoat material
The present invention provides a process for manufacturing an integrated circuit (IC) package and an integrated circuit (IC) package. The process, without...
US-7,648,271 Systems and methods for temperature measurement using n-factor coefficient correction
Various systems and methods for temperature measurement are disclosed. For example, some embodiments of the present invention provide temperature measurement...
US-7,647,219 Event-driven test framework
A modular instance-aware event-driven test framework is described. It includes an event-driven test framework, a transition-graph test model for the event-driven...
US-7,647,192 Active removal of aliasing frequencies in a decimating structure by changing a decimation ratio in time and space
When a sample stream is decimated, frequency components from outside of a desired frequency band are aliased into the desired band, causing interference and loss...
US-7,646,804 System and method for improving bit-loading in discrete multitone-based digital subscriber line modems
A system and method for improving bit-loading in discrete multitone (DMT)-based digital subscriber line (DSL) modems. In one embodiment, the system includes: (1)...
US-7,646,323 Clock generator
The present invention relates to controlling the timing of a clock signal in high speed circuits, such as an analogue-digital converter (ADC). In some high speed...
US-7,646,219 Translator circuit having internal positive feedback
An integrated circuit (200) includes a translator circuit (210) for translating from a lower logic-level voltage range signal (101(a), 101(b)) to a higher...
US-7,646,204 Method and system for testing a settling time for a device-under-test
A system and method are disclosed for testing a settling time of a device-under-test (DUT). A method for determining a settling time of a device-under-test (DUT)...
US-7,646,186 Holdover circuit for a power converter using a bi-directional switching regulator
A holdover circuit is configured with a holdover capacitor, preferably an aluminum electrolytic capacitor, to provide uninterruptible operation for an electrical...
US-7,645,704 Methods and apparatus of etch process control in fabrications of microstructures
The present invention provides a method for removing sacrificial materials in fabrications of microstructures using a selected spontaneous vapor phase chemical...
US-7,644,383 Method and system for correcting signal integrity crosstalk violations
A system and method for repairing crosstalk delays are disclosed herein. By modeling the change in effective capacitance, one may determine the delay...
US-7,644,330 Adapting scan architectures for low power operation
Scan architectures are commonly used to test digital circuitry in integrated circuits. The present invention describes a method of adapting conventional scan...
US-7,644,135 Method of improving communications data throughput on embedded systems and reducing the load on the operating...
A method is provided for dramatically improving communications data throughput on embedded systems and reducing the load on the operating system and central...
US-7,643,964 Method, system and apparatus for measuring an idle value of a central processing unit
In a method, system and apparatus for measuring an idle value of a Central Processing Unit (CPU) in an embedded system, the CPU increments a hardware counter in...
US-7,643,630 Echo suppression with increment/decrement, quick, and time-delay counter updating
Hands-free phones with voice activity detection using a comparison of frame power estimate with an adaptive frame noise power estimate, automatic gain control...
US-7,643,259 Substrate, with ESD magnetically induced wires, bound to passives/product ICS
A device is protected from induced or unexpected current spikes or surges, by receiving the current spikes through a conducting wire. The conducting wire is...
US-7,642,938 Gray code to sign and magnitude converter
The present invention relates to Gray Codes and their conversion to sign and magnitude representation. Gray codes are used in flash ADCs (analogue to digital...
US-7,642,852 Resistor self-trim circuit for increased performance
In a method and apparatus for trimming values of load resistors to reduce variations there between, a common mode feedback loop (CMFBL) included in a...
US-7,642,830 Method and delay circuit with accurately controlled duty cycle
A delay locked loop includes a storage element coupled to a data bus and produces a data synchronization signal. A phase detector receives a data clock signal...
US-7,642,819 High speed current mode write driver
An integrated circuit (100) includes a current mode write driver (105). The write driver (105) includes a switching control circuit (110) including (i) a DC...
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