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Patent # Description
US-7,642,814 Leakage compensation circuit using limiting current inverter
The leakage compensation circuit includes: a replica circuit of a circuit to be compensated, the replica circuit provides a replica leakage current equal to a...
US-7,642,729 Light-emitting device driving gear
When an APC selection signal FA is set to H level to start an APC operation, a monitor voltage V.sub.A is immediately generated from a monitor voltage generating...
US-7,642,725 Unbalanced plural string LED driver with common return resistor
The present disclosure describes systems and methods for driving light emitting diodes (LEDs). At least some embodiments include an LED driver system that...
US-7,642,649 Support structure for low-k dielectrics
A semiconductor device employs a support structure to mitigate damage to dielectric layers having a low dielectric constant (k). The semiconductor device...
US-7,642,619 Air gap in integrated circuit inductor fabrication
A semiconductor device, such as an inductor, is formed with an air gap. A first level has an intra-metal dielectric layer including one or more inductor loops,...
US-7,642,197 Method to improve performance of secondary active components in an esige CMOS technology
According to various embodiments, there are eSiGe CMOS devices and methods of making them. The method of making a substrate for a CMOS device can include...
US-7,642,153 Methods for forming gate electrodes for integrated circuits
A method of forming an integrated circuit can include the steps of providing a substrate having a semiconducting surface and forming a plurality of...
US-7,642,146 Semiconductor CMOS devices and methods with NMOS high-k dielectric present in core region that mitigate damage...
The present invention facilitates semiconductor fabrication by providing methods of fabrication that selectively form high-k dielectric layers within NMOS...
US-7,642,144 Transistors with recessed active trenches for increased effective gate width
A method of manufacturing a semiconductor device having recessed active trenches by providing a substrate with STI and active regions, forming a first oxide...
US-7,642,021 Method of mapping lithography focus errors
The present application is directed to a method for determining photolithography focus errors during production of a device. The method comprises providing a...
US-7,640,475 At-speed transition fault testing with low speed scan enable
A method and/or a system of at-speed transition fault testing with low speed scan enable is disclosed. In one embodiment, a digital system includes any number of...
US-7,640,474 System and method for input/output characterization
A test system in an integrated circuit includes a boundary scan cell. The boundary scan cell includes a first storage element and a second storage element...
US-7,640,471 On-board FIFO memory module for high speed digital sourcing and capture to/from DUT (device under test) using a...
In a method and system for testing, a tester (110) is operable to communicate test signals (124, 126) at a tester clock speed, and a device (190) to be tested is...
US-7,640,185 Dispensing system and method with radio frequency customer identification
A system and method for providing a fuel dispenser with radio frequency customer identification capabilities. The system and method determines whether a...
US-7,639,745 Serial data link with automatic power down
A serial data link (10) includes a transmitter (12) using a differential transmitter cell (20) to transmit data using differential signals and a receiver (14)...
US-7,639,626 Built in self test
There is provided a method for Loss of Signal Built In Self Test, and corresponding apparatus comprising: a loopback driver for receiving test signals, and for...
US-7,639,463 Apparatus and method for reducing leakage between an input terminal and power rail
An apparatus for reducing current leakage between an input locus and at least one power rail for a system includes, for each respective power rail: (a) A first...
US-7,639,442 Methods and apparatus to perform hard-disk drive head proximity detection in a preamplifier
Methods and apparatus to perform hard-disk drive head proximity detection in a preamplifier are described. One example method of detecting head position in a...
US-7,639,082 System and method for amplifier gain measurement and compensation
A system and method for amplifier gain measurement and compensation. A method for compensating a signal gain of an amplifier circuit includes determining a...
US-7,639,070 Switching circuit in a phase locked loop (PLL) to minimize current leakage in integrated circuits
In an apparatus and method for reducing current leakage in a phase locked loop (PLL), a pair of resistive divider circuit is coupled to receive a pair of...
US-7,639,056 Ultra low area overhead retention flip-flop for power-down applications
In a method and system for data retention, a data input is latched by a first latch. A second latch coupled to the first latch receives the data input for...
US-7,638,843 Integrating high performance and low power multi-gate devices
A semiconductor device comprises a first multi-gate device and a second multi-gate device on a semiconductor substrate. The first multi-gate device comprises a...
US-7,638,415 Method for reducing dislocation threading using a suppression implant
The present invention provides a method for manufacturing a semiconductor device. In one embodiment, the method for manufacturing the semiconductor device...
US-7,638,412 Method and system for reducing charge damage in silicon-on-insulator technology
According to one embodiment of the invention, a silicon-on-insulator device includes an insulative layer formed overlying a substrate and a source and drain...
US-7,638,402 Sidewall spacer pullback scheme
A sidewall spacer pullback scheme is implemented in forming a transistor. The scheme, among other things, allows silicide regions of the transistor to be made...
US-7,638,401 Memory device with surface-channel peripheral transistors
A method of forming a memory device (e.g., a DRAM) including array and peripheral circuitry. A plurality of undoped polysilicon gates 58 are formed. These gates...
US-7,637,658 Systems and methods for PWM clocking in a temperature measurement circuit
Various systems and methods for pulse width modulated clocking in a temperature measurement are disclosed. For example, some embodiments of the present invention...
US-7,636,875 Low noise coding for digital data interface
A digital data interface system comprises a data transmitter configured to transmit a data word across a plurality of data lines. The data word can comprise a...
US-7,636,190 Method of projecting an image from a reflective light valve
Disclosed herein is a method of projecting images using reflective light valves. Pixel patterns generated of the light valve pixels based on image data are...
US-7,635,914 Multi layer low cost cavity substrate fabrication for pop packages
In a method and system for fabricating a semiconductor device (100) having a package-on-package structure, a base laminate substrate (BLS) (110) is formed to...
US-7,635,613 Semiconductor device having firmly secured heat spreader
A semiconductor device comprising a leadframe (903), which has first (903a) and second (903b) surfaces, a planar pad (910) of a certain size, and a plurality of...
US-7,634,643 Stack register reference control bit in source operand of instruction
A processor is disclosed herein that may execute an instruction that includes an immediate value and a reference to a register accessible to the processor. The...
US-7,634,226 Propagation of data throughout an area using distributed transponders and scanners with relative movement
A method is provided for propagating data among multiple locations in an area. The method includes using a plurality of transponders distributed throughout the...
US-7,634,020 Preamble for a TFI-OFDM communications system
System and method for simplifying preamble detection and reducing power consumption in receivers. A preferred embodiment comprises a preamble made up of two...
US-7,634,019 Beam forming for transmit using bluetooth modified hopping sequences (BFTBMH)
A communication circuit (28) is designed with a signal processing circuit (370) arranged to produce a first plurality of data signals and receive a second...
US-7,633,339 Differential amplifier
An amplifier comprising an analog amplifier which outputs a first current and a second current. The amplifier also comprises a first digital amplifier coupled to...
US-7,633,336 Audio amplifier and methods of generating audio signals
Audio amplifiers and methods of generating audio signals are disclosed. A disclosed example amplifier comprises a first driver to receive a first signal; a...
US-7,633,314 System and method for reducing power-on-transient current magnitude
System and method for reducing power-on transient current magnitude on distributed header switches. A preferred embodiment comprises a distributed header switch...
US-7,633,280 Low drop voltage regulator with instant load regulation and method
An LDO regulator (10) produces an output voltage (Vout) by applying the output voltage to a feedback input (6) of a differential input stage (10A) and applying...
US-7,630,841 Supervising and sequencing commonly driven power supplies with digital information
Methods and apparatus for power monitoring with sequencing and supervision are disclosed. An example method disclosed herein includes supervising a first power...
US-7,630,408 Simultaneous primary, secondary, and tertiary synchronization codes over separate channels
A method of processing data comprises the receiving a frame of data having a predetermined number of time slots (502,504,506). Each time slot comprises a...
US-7,630,403 MAC aggregation frame with MSDU and fragment of MSDU
Apparatus and methods implement aggregation frames and allocation frames. The aggregation frames include a plurality of MSDUs or fragments thereof aggregated or...
US-7,630,270 Dual mode SRAM architecture for voltage scaling and power management
The present disclosure provides a dual-mode voltage controller, a method of supplying voltage to SRAM periphery circuits and an integrated circuit. In one...
US-7,630,258 Decoder based set associative repair cache systems and methods
The present invention facilitates memory devices and operation thereof by employing a repair cache system 600 to correct or repair identified faulty memory...
US-7,630,257 Methods and systems for accessing memory
One aspect of the invention relates to a method for accessing a memory device. One embodiment relates to a method for accessing a memory device. In the method...
US-7,630,135 Two-dimensional blazed MEMS granting
A method for assuring a blazed condition in a DMD device used in telecommunications applications. By meeting certain conditions in the fabrication and operation...
US-7,630,120 Non-contacting electrostatically driven MEMS device
A microelectromechanical device has a movable first electrode and stationary second and third electrodes oriented parallel with the substrate. The first...
US-7,630,085 Interferometers of high resolutions
The present invention provides a microstructure device comprising multiple substrates with the components of the device formed on the substrates. In order to...
US-7,629,910 Methods and apparatus to control current steering digital to analog converters
Methods and apparatus to control current steering digital to analog converters are described herein. In one example, a digital to analog converter includes a...
US-7,629,808 Parallel scan distributors and collectors and process of testing integrated circuits
An integrated circuit (70) having parallel scan paths (824-842, 924-942) includes a pair or pairs of scan distributor (800,900) and scan collector (844,944)...
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