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Semiconductive device fabricated using a raised layer to silicide the gate
In one aspect, the invention provides a method of fabricating a semiconductive device 200 that comprises forming a raised layer  adjacent a gate  and...
Drain extended MOS transistors and methods for making the same
Drain extended MOS transistors (52) and fabrication methods (100) therefor are presented, in which a voltage drop region (80) is provided in a well (82) of a...
Method and system for drying semiconductor wafers in a spin coating
The invention provides methods and apparatus for drying the backside of semiconductor wafers in a spin-coating environment. Solvent is evaporatively dried from a...
Token-based trace system
A system comprising a target hardware comprising multiple processor cores and an application. The system also comprises a host computer coupled to the target...
Apparatus and method for test and debug of a processor/core having
advanced power management
An interface unit is provided in a JTAG test and debug procedure involving a plurality of processor cores. The interface unit includes a TAP unit. A switch unit...
Semiconductor device for a tuner and diversity receiver
A semiconductor device for a tuner generates a local oscillation signal inside or selects a local oscillation signal introduced from the outside, and controls...
Multi-mode color filter
A multi-mode color filter 400 having an inner hub region 402 used to mount the color filter 400 to a motor shaft. A first track 404 and a second track 406 of...
Characterization of micromirror array devices using interferometers
The invention provides a method and apparatus for evaluating the quality of microelectromechanical devices having deformable and deflectable members using...
Data-dependent, logic-level drive scheme for driving LCD panels
System and method for driving an LCD using a data-dependent, logic-level drive scheme. A preferred embodiment comprises determining a desired state of each pixel...
Apparatus and method for managing access to the analog-to-digital
In an analog-to-digital converter used to convert and store in buffer registers signals from a plurality of peripheral devices, a mode is provided wherein the...
PWM driver and class D amplifier using same
The objective of the invention is to provide a class D amplifier that can reduce aliasing noise. The class D amplifier has D/A converter 10 that operates at the...
Low voltage amplifier having a class-AB control circuit
A low voltage amplifier having a class-AB control circuit which generates minimal or no surge current when the output of the amplifier clips to ground or the...
Dual transconductance amplifiers and differential amplifiers implemented
using such dual transconductance...
Various systems and methods for signal amplification are disclosed. For example, some embodiments of the present invention provide differential amplifiers that...
Implantation of carbon and/or fluorine in NMOS fabrication
Formation of an NMOS transistor is disclosed, where at least one of carbon, atomic fluorine and molecular fluorine (F.sub.2) are combined with implantations of...
Highly doped gate electrode made by rapidly melting and resolidifying the
The present invention provides, in one embodiment, a method for fabricating a microelectronic device. The method comprises implanting a dopant into a gate...
Apparatus and method for a smart image-receptor unit
In an optical image acquisition and information transmission system, the system components can be fabricated, according to a first implementation, in a stack...
Broken die detect sensor
A broken trim die tool detection sensor. The lands of the tie bar die connect with the leads of the unit to form switches. The states of these switches indicate...
Sequential scan technique for testing integrated circuits with reduced
power, time and/or cost
Each portion of an integrated circuit is tested using Automatic test pattern generation (ATPG) technique to detect intra-portion faults. Inter-portion faults are...
Distributed width trace receiver
Input processing limitations may be solved by placing two units in parallel, with each unit recording some portion of the incoming data. This requires the...
Multi-port trace receiver
A trace receiver with multiple recording interfaces is used to record the same input. This configuration may provide multiple recording interfaces and multiple...
Memory management of local variables upon a change of context
A cache subsystem may comprise a multi-way set associative cache and a data memory that holds a contiguous block of memory defined by an address stored in a...
Data transfer apparatus with channel controller and transfer controller
capable of slave and standalone operation
A data transfer control apparatus includes a channel controller and a transfer controller. The channel controller receives, prioritizes and queues data transfer...
Preserving emulation capability in a multi-core system-on-chip device
A system comprises a multi-core silicon-on-chip (SOC) device. The SOC device includes a core module, a test data shift path, a core power control module, and an...
Plural circuit selection using role reversing control inputs
Data is communicated through two separate circuits or circuit groups, each having clock and mode inputs, by sequentially reversing the role of the clock and mode...
Producing control signals indicating transmit diversity and no transmit
A circuit is designed with a measurement circuit (746) coupled to receive an input signal from at least one of a first antenna and a second antenna of a...
Method and apparatus for decoder input scaling based on interference
estimation in CDMA
A method and apparatus adaptively scales the decoder input for a low-cost user equipment (UE) to reduce the memory requirement without degrading decoder...
Predistortion calibration in a transceiver assembly
Systems and methods are provided for calibrating a digital predistorter in an integrated transceiver circuit. A digital transmitter path provides a signal from a...
Receiver-side selection of DSL communications mode
A client premises digital subscriber line (DSL) modem having multi-mode capability is disclosed. In initialization, the modem estimates whether channel...
Area efficient implementation of the consecutive access counter
An arbitration unit grants access to a shared resource to one of a plurality of devices. A consecutive access register corresponds to each device. A consecutive...
Capacitor boost sensing
A memory cell for storing a charge that gives rise to a cell voltage representing a bit value, the memory cell being capable of having the cell voltage boosted...
Method and apparatus for setting gamma correction voltages for LCD source
A gamma reference voltage generator (10B) for an LCD display includes a control interface logic circuit (48) having an output bus coupled to inputs of a first...
Phase-locked loop circuit having correction for active filter offset
A phase locked loop (PLL) circuit automatically corrects the offset of the analog (especially active type) loop filter to improve the stability and precision of...
Integrator and error amplifier
An integrator is provided with protection against drift in the value of an integral during power save mode. An N-bit counter (12) is driven by the output of a...
Method and system for transitioning between operation states in an output
A closed loop amplifier system comprising a modulator that provides a pulse-width modulated (PWM) output signal based on an input signal, the modulator having a...
High-voltage operational amplifier input stage and method
Circuitry for preventing damage to differentially coupled input JFETs in an integrated circuit amplifier includes first (J2) and second (J4) differentially...
Circuits, devices and methods for regulator minimum load control
Systems, methods and circuits for regulator minimum load control. In one particular case, a system is provided that includes a load control circuit and a...
Methods, systems and structures for forming semiconductor structures
incorporating high-temperature processing...
A method (100) of forming semiconductor structures (202) including high-temperature processing steps (step 118), incorporates the use of a high-temperature...
Recess etch for epitaxial SiGe
A PMOS transistor and a method for fabricating a PMOS transistor. The method may include providing a semiconductor wafer having a PMOS transistor gate stack,...
Debug and test system with format select register circuitry
A system and method for sharing a communications link between multiple protocols is described that comprises a system comprising a communications interface...
Frequency domain training of prefilters with interference suppression
Prefilters for a receiver with multiple input branches are trained in the frequency domain. The frequency response B of a conditioned channel is determined...
Transient triggered protection of IC components
One embodiment provides a system for protecting at least one component in an integrated circuit (IC). The system includes a disconnect element that is...
Reducing power consumption in the early stages of a pipeline sub-ADC used
in a time-interleaved ADC
A stage of a pipelined ADC used as a sub-ADC in a time-interleaved ADC is operated using a first set of clock signals, with a next stage being operated using a...
Glitch reduced compensated circuits and methods for using such
Various embodiments of the present invention provide systems and methods for glitch reduced circuits. As one example, a glitch reduced, variable width driver...
System and method for characterizing a load at the end of a cable
Apparatus within power sourcing equipment and a method for determining whether a load within a powered device coupled to the power sourcing equipment via a cable...
Grooved substrates for uniform underfilling solder ball assembled
A semiconductor assembly (300) comprising a semiconductor device (301), which has a plurality of metallic contact pads (302) and an outline by sides (303). A...
Composite metal column for mounting semiconductor device
An integrated circuit chip which has a plurality of pads and non-reflowable contact members to be connected by reflow attachment to external parts. Each of these...
Forming a semiconductor structure in manufacturing a semiconductor device
using one or more epitaxial growth...
In one embodiment, a semiconductor structure used in manufacturing a semiconductor device includes a substrate layer. The structure also includes first and...
Patterned plasma treatment to improve distribution of underfill material
A patterned plasma treatment may be provided on the chip and/or the substrate to enhance the distribution of underfill material between the chip and the...
Vapor deposition system using benzotriazole (BTA) and isopropyl alcohol
for protecting copper interconnects
A method of protecting an interconnect is provided. The method includes forming an integrated circuit structure having an interconnect, and depositing vaporized...
Method for providing real-time power conservation in a processor
A method for providing power conservation in a processor in which, depending on the respective embodiment, a relative amount of idle time, activity time, or idle...