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Patent # Description
US-7,555,681 Multi-port trace receiver
A trace receiver with multiple recording interfaces is used to record the same input. This configuration may provide multiple recording interfaces and multiple...
US-7,555,611 Memory management of local variables upon a change of context
A cache subsystem may comprise a multi-way set associative cache and a data memory that holds a contiguous block of memory defined by an address stored in a...
US-7,555,577 Data transfer apparatus with channel controller and transfer controller capable of slave and standalone operation
A data transfer control apparatus includes a channel controller and a transfer controller. The channel controller receives, prioritizes and queues data transfer...
US-7,555,422 Preserving emulation capability in a multi-core system-on-chip device
A system comprises a multi-core silicon-on-chip (SOC) device. The SOC device includes a core module, a test data shift path, a core power control module, and an...
US-7,555,086 Plural circuit selection using role reversing control inputs
Data is communicated through two separate circuits or circuit groups, each having clock and mode inputs, by sequentially reversing the role of the clock and mode...
US-7,555,068 Producing control signals indicating transmit diversity and no transmit diversity
A circuit is designed with a measurement circuit (746) coupled to receive an input signal from at least one of a first antenna and a second antenna of a...
US-7,555,067 Method and apparatus for decoder input scaling based on interference estimation in CDMA
A method and apparatus adaptively scales the decoder input for a low-cost user equipment (UE) to reduce the memory requirement without degrading decoder...
US-7,555,057 Predistortion calibration in a transceiver assembly
Systems and methods are provided for calibrating a digital predistorter in an integrated transceiver circuit. A digital transmitter path provides a signal from a...
US-7,555,049 Receiver-side selection of DSL communications mode
A client premises digital subscriber line (DSL) modem having multi-mode capability is disclosed. In initialization, the modem estimates whether channel...
US-7,555,005 Area efficient implementation of the consecutive access counter
An arbitration unit grants access to a shared resource to one of a plurality of devices. A consecutive access register corresponds to each device. A consecutive...
US-7,554,867 Capacitor boost sensing
A memory cell for storing a charge that gives rise to a cell voltage representing a bit value, the memory cell being capable of having the cell voltage boosted...
US-7,554,517 Method and apparatus for setting gamma correction voltages for LCD source drivers
A gamma reference voltage generator (10B) for an LCD display includes a control interface logic circuit (48) having an output bus coupled to inputs of a first...
US-7,554,412 Phase-locked loop circuit having correction for active filter offset
A phase locked loop (PLL) circuit automatically corrects the offset of the analog (especially active type) loop filter to improve the stability and precision of...
US-7,554,400 Integrator and error amplifier
An integrator is provided with protection against drift in the value of an integral during power save mode. An N-bit counter (12) is driven by the output of a...
US-7,554,390 Method and system for transitioning between operation states in an output system
A closed loop amplifier system comprising a modulator that provides a pulse-width modulated (PWM) output signal based on an input signal, the modulator having a...
US-7,554,364 High-voltage operational amplifier input stage and method
Circuitry for preventing damage to differentially coupled input JFETs in an integrated circuit amplifier includes first (J2) and second (J4) differentially...
US-7,554,309 Circuits, devices and methods for regulator minimum load control
Systems, methods and circuits for regulator minimum load control. In one particular case, a system is provided that includes a load control circuit and a...
US-7,553,718 Methods, systems and structures for forming semiconductor structures incorporating high-temperature processing...
A method (100) of forming semiconductor structures (202) including high-temperature processing steps (step 118), incorporates the use of a high-temperature...
US-7,553,717 Recess etch for epitaxial SiGe
A PMOS transistor and a method for fabricating a PMOS transistor. The method may include providing a semiconductor wafer having a PMOS transistor gate stack,...
US-7,552,360 Debug and test system with format select register circuitry
A system and method for sharing a communications link between multiple protocols is described that comprises a system comprising a communications interface...
US-7,551,701 Frequency domain training of prefilters with interference suppression
Prefilters for a receiver with multiple input branches are trained in the frequency domain. The frequency response B of a conditioned channel is determined...
US-7,551,413 Transient triggered protection of IC components
One embodiment provides a system for protecting at least one component in an integrated circuit (IC). The system includes a disconnect element that is...
US-7,551,114 Reducing power consumption in the early stages of a pipeline sub-ADC used in a time-interleaved ADC
A stage of a pipelined ADC used as a sub-ADC in a time-interleaved ADC is operated using a first set of clock signals, with a next stage being operated using a...
US-7,550,993 Glitch reduced compensated circuits and methods for using such
Various embodiments of the present invention provide systems and methods for glitch reduced circuits. As one example, a glitch reduced, variable width driver...
US-7,550,980 System and method for characterizing a load at the end of a cable
Apparatus within power sourcing equipment and a method for determining whether a load within a powered device coupled to the power sourcing equipment via a cable...
US-7,550,856 Grooved substrates for uniform underfilling solder ball assembled electronic devices
A semiconductor assembly (300) comprising a semiconductor device (301), which has a plurality of metallic contact pads (302) and an outline by sides (303). A...
US-7,550,852 Composite metal column for mounting semiconductor device
An integrated circuit chip which has a plurality of pads and non-reflowable contact members to be connected by reflow attachment to external parts. Each of these...
US-7,550,343 Forming a semiconductor structure in manufacturing a semiconductor device using one or more epitaxial growth...
In one embodiment, a semiconductor structure used in manufacturing a semiconductor device includes a substrate layer. The structure also includes first and...
US-7,550,314 Patterned plasma treatment to improve distribution of underfill material
A patterned plasma treatment may be provided on the chip and/or the substrate to enhance the distribution of underfill material between the chip and the...
US-7,550,046 Vapor deposition system using benzotriazole (BTA) and isopropyl alcohol for protecting copper interconnects
A method of protecting an interconnect is provided. The method includes forming an integrated circuit structure having an interconnect, and depositing vaporized...
US-7,549,071 Method for providing real-time power conservation in a processor
A method for providing power conservation in a processor in which, depending on the respective embodiment, a relative amount of idle time, activity time, or idle...
US-7,549,007 Portable computer having an interface for direct connection to a mobile telephone
The present invention provides a solution to the dual problems of mobility and portability associated with using a portable telephone in combination with a...
US-7,548,365 Semiconductor device and method comprising a high voltage reset driver and an isolated memory array
A method of operating a semiconductor device, a semiconductor device and a digital micromirror system are presented. In an embodiment, the semiconductor device...
US-7,548,179 MASH sigma delta modulator
A Multi-stage noise shaping Sigma Delta Modulator (MSDM) and method of processing data using the MSDM are disclosed. The MSDM is capable of operating at high...
US-7,548,097 Flyback current control
One embodiment of the invention includes a power driver system. The power driver system comprises a power transistor that is activated to provide power to a load...
US-7,547,630 Method for stacking semiconductor chips
In a semiconductor system (100) including a chip (101) and a workpiece (102), the chip has metal-filled vias (140) positioned between contact pads (120) and the...
US-7,547,596 Method of enhancing drive current in a transistor
A method of manufacturing a semiconductor device includes forming transistors including gate electrodes and source/drain regions over a substrate. A protective...
US-7,546,636 Authorization control circuit and method
An authorization control circuit (10) comprises a digital signal processor (12) operable to provide digital data output, determine an authorization state, and...
US-7,546,503 Selecting between tap/scan with instructions and lock out signal
A process of selecting alternative test circuitry within an integrated circuit enables a test access port. Scan test instruction data is loaded into an...
US-7,546,502 1114.9 tap linking modules
IEEE 1149.1 Test Access Ports (TAPs) may be utilized at both IC and intellectual property core design levels. TAPs serve as serial communication ports for...
US-7,546,501 Selecting test circuitry from header signals on power lead
The present disclosure describes a novel method and apparatus for using a device's power and ground terminals as a test and/or debug interface for the device....
US-7,546,437 Memory usable in cache mode or scratch pad mode to reduce the frequency of memory accesses
A processor adapted to couple to external memory. The processor comprises a controller and data storage (e.g., cache memory). The data storage is configurable to...
US-7,546,392 Data transfer with single channel controller controlling plural transfer controllers
A data transfer control apparatus includes a channel controller and plural transfer controllers. The channel controller receives, prioritizes and queues data...
US-7,546,391 Direct memory access channel controller with quick channels, event queue and active channel memory protection
A data transfer control apparatus includes a channel controller and a transfer controller. The channel controller receives, prioritizes and queues event signals...
US-7,545,890 Method for upstream CATV coded modulation
The present invention provides an encoding method and a class of decoding methods that provide methods for high throughput and high robustness digital...
US-7,545,658 DC-DC boost converter with a charge pump
A DC-DC boost converter comprises a charge pump selectively operating in a voltage doubler or in a voltage tripler mode. A switching arrangement connects the...
US-7,545,316 Apparatus and methods to share time and frequency data between a host processor and a satellite positioning...
Methods and apparatus to share time and frequency data between a host processor and a satellite position system (SPS) receiver in a satellite positioning system...
US-7,543,285 Method and system of adaptive dynamic compiler resolution
A method and system of adaptive dynamic compiler resolution. At least some of the illustrative embodiments are a computer-implemented method comprising compiling...
US-7,543,205 Control signal synchronization of a scannable storage circuit
A system of control signal synchronization of a scannable storage circuit includes any number of storage circuits interconnected together with logic circuitry to...
US-7,543,158 Hybrid cryptographic accelerator and method of operation thereof
For use in a system-on-a-chip (SoC) having a secure execution environment (SEE) containing secure memory, a cryptographic accelerator, a method of performing...
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