Easy To Use Patents Search & Patent Lawyer Directory

At Patents you can conduct a Patent Search, File a Patent Application, find a Patent Attorney, or search available technology through our Patent Exchange. Patents are available using simple keyword or date criteria. If you are looking to hire a patent attorney, you've come to the right place. Protect your idea and hire a patent lawyer.

Searching: texas instruments





Search by keyword, patent number, inventor, assignee, city or state:




Patent # Description
US-7,594,162 Viterbi pretraceback for partial cascade processing
This invention modifies Viterbi decoding to improve BER. Within the state metric unit cascade block, this invention forces the unused ACS units decision bits to...
US-7,593,841 Emulation export sequence with distributed control
Emulation information including emulation control information and emulation data is exported from a data processor by arranging the emulation information into...
US-7,593,580 Video encoding using parallel processors
A digital video acquisition system including a plurality of image processors (30A; 30B) is disclosed. A CCD imager (22) presents video image data on a bus...
US-7,592,867 Common mode feedback for large output swing and low differential error
A differential amplifier includes a differential input pair (2A) coupled to a folded cascode stage (2B) and a common mode feedback circuit (34) including a...
US-7,592,860 Minimizing the number of external terminals required when compensation is to be provided for signal drop in...
Compensation is provided for signal drop in bond wires of an integrated circuit (IC) while minimizing the number of external terminals in the IC package. A...
US-7,592,859 Apparatus to compare an input voltage with a threshold voltage
Apparatus to compare an input signal to a threshold level are disclosed. An example circuit described herein includes a Widlar bandgap circuit to receive the...
US-7,592,794 Integrated low power received signal strength indicator (RSSI) with linear characteristic
An RSS indicator with a linear characteristic that is of a simple configuration, low current consumption and small die area requirements, comprises a pair of...
US-7,592,252 Versatile system for charge dissipation in the formation of semiconductor device structures
The present invention provides a system for dissipating any aberrant charge that may accumulate during the fabrication of a semiconductor device segment (200),...
US-7,590,974 Recovery from corruption using event offset format in data trace
A method of tracing data processor activity with recover from detection of trace stream corruption. If the first trace data following detection of corruption is...
US-7,590,912 Using a chip as a simulation engine
The chip is placed in self simulation mode. When the trace logic does not have any more data to output it changes the state of the advance signal. The clock...
US-7,590,910 Tap and linking module for scan access of multiple cores with IEEE 1149.1 test access ports
An architecture for testing a plurality of circuits on an integrated circuit is described. The architecture includes a TAP Linking Module located between test...
US-7,590,894 Method of translating system events into signals for activity monitoring
Disclosed herein is a system and method for receiving encoded events from a system that is being debugged or profiled. The encoded events are input to a decoder...
US-7,590,893 Recording control point in trace receivers
A trace receiver with multiple recording interfaces may be used to record the same input. The historical control point for starting and stopping trace recording...
US-7,590,892 Method and system of profiling real-time streaming channels
A method and system of profiling streaming channels. At least some of the illustrative embodiments are methods comprising executing a traced program on a target...
US-7,590,677 Processor with summation instruction using overflow counter
Performing a sum of numbers operation in a variable bit-length environment of a processor in response to a summation instruction, comprising a) adding a least...
US-7,590,047 Memory optimization packet loss concealment in a voice over packet network
A method to reduce memory requirements for a packet loss concealment algorithm in the event of packet loss in a receiver of pulse code modulated voice signals. A...
US-7,589,533 One time operating state detecting method and apparatus
A method and apparatus for detecting a change in an electrical property between contacts. A one-time operating state detection device includes a member coupling...
US-7,589,516 Poly-phase electric energy meter
A poly-phase electric energy meter comprises a front-end that converts analog current input signals and analog voltage input signals to digital current and...
US-7,589,378 Power LDMOS transistor
A laterally diffused metal-oxide-semiconductor transistor device includes a substrate having a first conductivity type with a semiconductor layer formed over the...
US-7,587,757 Surveillance implementation in managed VOP networks
A procedure for accomplishing surveillance within a managed VoP network when end-user encryption/decryption and NAT are in place. The procedure comprises first...
US-7,587,648 Integrated circuit having electrically isolatable test circuitry
Special test circuitry in an IC for wafer level testing selectively connects the specialized test circuitry to the functional circuitry during wafer test....
US-7,587,644 Scan testing using response pattern as stimulus pattern after reset
Scan testing of plural target electrical circuits, such as circuits 1 through N, becomes accelerated by using the scan test response data output from one...
US-7,587,642 System and method for performing concurrent mixed signal testing on a single processor
The present application describes a system and method for testing semiconductor devices and specifically for testing mixed signal semiconductor devices. The test...
US-7,587,583 Method and system for processing a "WIDE" opcode when it is not used as a prefix for an immediately following...
Methods and systems are provided for the selective use of a Java WIDE opcode as a prefix as defined in the instruction set of the Java virtual machine or...
US-7,587,577 Pipelined access by FFT and filter units in co-processor and system bus slave to memory blocks via switch...
A system architecture including a co-processor and a memory switch resource is disclosed. The memory switch includes multiple memory blocks and switch circuitry...
US-7,587,539 Methods of inter-integrated circuit addressing and devices for performing the same
Inter-integrated circuit-capable devices for use on an inter-integrated circuit bus are disclosed. The inter-integrated circuit-capable devices include...
US-7,587,532 Full/selector output from one of plural flag generation count outputs
A method and apparatus for adaptive buffer sizing adjusts the size of the buffer at different levels using a "high water mark" to different levels for different...
US-7,587,525 Power control with standby, wait, idle, and wakeup signals
An apparatus and method for conserving power in a memory information transfer system. The system may include a direct memory access (DMA) controller coupled to a...
US-7,587,315 Concealment of frame erasures and method
A decoder for code excited LP encoded frames with both adaptive and fixed codebooks; erased frame concealment uses repetitive excitation plus a smoothing of...
US-7,587,190 Systems and methods for low power clock generation
Various systems and methods for low power identification are described herein. For example, a radio frequency device including a radio frequency energy receiver....
US-7,586,993 Interleaver memory selectably receiving PN or counter chain read address
A method and apparatus for interleaving multiple frames of data as disclosed provide for an extremely streamlined approach to achieving both methods of...
US-7,586,668 Methods for depositing, releasing and packaging micro-electromechanical devices on wafer substrates
A method for forming a MEMS device is disclosed, where a final release step is performed just prior to a wafer bonding step to protect the MEMS device from...
US-7,586,659 Audio MEMS mirror feedback
A mirror device and a method for audio feedback of a MEMS mirror device are presented. The mirror device includes a mirror with a reflective surface located to...
US-7,586,376 Pre-power amplifier of load, switch array, and impedance compensation
A novel and useful load compensation circuit and associated pre-power amplifier constructed therefrom. The load compensation circuit functions to maintain a...
US-7,586,368 Simultaneous filtering and compensation circuitry and method in chopping amplifier
A chopper-stabilized amplifier (1B) having a first output (25) includes an input chopper (9) for chopping an input signal and applying it to the input of a first...
US-7,586,357 Systems for providing a constant resistance
A system for providing a desired substantially constant resistance includes a first transistor interconnected between a first node and a second node. The system...
US-7,586,349 CMOS integrated circuit for correction of duty cycle of clock signal
A CMOS integrated circuit (12) for correction of the duty cycle of a clock signal has a correction amplifier (16) to which a clock signal (14) is applied. The...
US-7,585,738 Method of forming a fully silicided semiconductor device with independent gate and source/drain doping and...
A method of forming a fully silicided semiconductor device with independent gate and source/drain doping and related device. At least some of the illustrative...
US-7,584,097 System and method for noisy automatic speech recognition employing joint compensation of additive and...
A system for, and method of, noisy automatic speech recognition employing joint compensation of additive and convolutive distortions and a digital signal...
US-7,583,976 Method and apparatus for transmit power control in wireless data communication systems
The distance between a first Multi Band Orthogonal Frequency Division Multiplex (MB-OFDM) data transceiver and a second or more such transceiver is determined...
US-7,583,764 Versatile system for interference tolerant packet detection in wireless communication systems
The present invention provides a system for obviating interference effects in packet detection within a wireless communications network. A plurality of reference...
US-7,583,594 Adaptive transmit window control mechanism for packet transport in a universal port or multi-channel environment
The transmit window size of a Simple Packet Relay Transport protocol packet transmission system can determine the efficiency of transmission and the memory...
US-7,583,156 Oscillator with multi-tap inductor, capacitors, and negative-Gm stages
System and method for increasing the frequency tuning range of a RF/microwave LC oscillator. An electronic communications device includes a controller to...
US-7,583,147 Buffer drive
The present invention relates to a CMOS buffer circuit for liquid crystal display (LCD) drivers, which includes a single stage operational transconductance...
US-7,583,133 Self-oscillating regulated low-ripple charge pump and method
Charge pump circuitry (30) compares bottom plate voltages of first (C1) and second (C2) flying capacitors in a current mode charge pump (1B) to a reference value...
US-7,582,963 Vertically integrated system-in-a-package
According to one embodiment of the invention, a method of forming a system-in-a-package includes providing a first substrate, coupling a first die to a top...
US-7,582,521 Dual metal gates for mugfet device
Exemplary embodiments provide methods and structures for controlling work function values of dual metal gate electrodes for transistor devices. Specifically, the...
US-7,581,159 Simplified decoding using structured and punctured LDPC codes
A communications transceiver for transmitting and receiving coded communications, with the coding corresponding to a low-density parity check code, is disclosed....
US-7,581,139 Distinguishing between two classes of trace information
A method of tracing activity of a data processor generates a trace data stream during a normal background mode and a foreground mode while servicing a real time...
US-7,581,082 Software source transfer selects instruction word sizes
This invention employs a 16-bit instruction set that has a subset of the functionality of the 32-bit instruction set. In this invention 16-bit instructions and...
← Previous | 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200 | Next →

File A Patent Application

  • Protect your idea -- Don't let someone else file first. Learn more.

  • 3 Easy Steps -- Complete Form, application Review, and File. See our process.

  • Attorney Review -- Have your application reviewed by a Patent Attorney. See what's included.